56 lines
1.6 KiB
LLVM
56 lines
1.6 KiB
LLVM
; RUN: llc -march=mips -mcpu=mips32r5 -mattr=+fp64,+msa,+nooddspreg < %s | FileCheck %s
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; Test that the register allocator honours +nooddspreg and does not pick an odd
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; single precision subregister of an MSA register.
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@f1 = external global float
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@f2 = external global float
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@v3 = external global <4 x float>
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@d1 = external global double
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define void @test() {
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; CHECK-LABEL: test:
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entry:
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; CHECK-NOT: lwc1 $f{{[13579]+}}
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; CHECK: lwc1 $f{{[02468]+}}
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%0 = load float, float * @f1
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%1 = insertelement <4 x float> undef, float %0, i32 0
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%2 = insertelement <4 x float> %1, float %0, i32 1
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%3 = insertelement <4 x float> %2, float %0, i32 2
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%4 = insertelement <4 x float> %3, float %0, i32 3
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; CHECK-NOT: lwc1 $f{{[13579]+}}
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; CHECK: lwc1 $f{{[02468]+}}
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%5 = load float, float * @f2
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%6 = insertelement <4 x float> undef, float %5, i32 0
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%7 = insertelement <4 x float> %6, float %5, i32 1
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%8 = insertelement <4 x float> %7, float %5, i32 2
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%9 = insertelement <4 x float> %8, float %5, i32 3
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%10 = fadd <4 x float> %4, %9
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store <4 x float> %10, <4 x float> * @v3
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ret void
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}
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; Test that the register allocator hnours +noodspreg and does not pick an odd
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; single precision register for a load to perform a conversion to a double.
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define void @test2() {
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; CHECK-LABEL: test2:
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entry:
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; CHECK-NOT: lwc1 $f{{[13579]+}}
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; CHECK: lwc1 $f{{[02468]+}}
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%0 = load float, float * @f1
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%1 = fpext float %0 to double
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; CHECK-NOT: lwc1 $f{{[13579]+}}
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; CHECK: lwc1 $f{{[02468]+}}
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%2 = load float, float * @f2
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%3 = fpext float %2 to double
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%4 = fadd double %1, %3
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store double%4, double * @d1
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ret void
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}
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