Wang, Pengfei 2379949aad [X86] AVX512FP16 instructions enabling 3/6 ... Enable FP16 conversion instructions. Ref.: https://software.intel.com/content/www/us/en/develop/download/intel-avx512-fp16-architecture-specification.html Reviewed By: LuoYuanke Differential Revision: https://reviews.llvm.org/D105265		2021-08-18 09:03:41 +08:00
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AArch64	[Aarch64] Adding support for Armv9-A Realm Management Extension	2021-06-28 13:45:22 +01:00
AMDGPU	[AMDGPU] Make BVH isel consistent with other MIMG opcodes	2021-08-17 10:42:22 +09:00
ARC	[ARC] Add codegen for count trailing zeros intrinsic for the ARC backend	2021-08-10 12:07:35 -07:00
ARM	[ARMInstPrinter] Print the target address of a branch instruction	2021-06-30 16:35:28 +07:00
Hexagon	…
Lanai	…
M68k	[M68k] Update disassembler test case following up ADD / ADDA changes	2021-08-08 14:20:46 -07:00
MSP430	…
Mips	[mips] Add tests to check disassembling of add.ps/mul.ps/sub.ps instructions	2020-11-13 14:31:12 +03:00
PowerPC	[PowerPC]Add addex instruction definition and MC tests	2021-07-26 14:55:38 -05:00
RISCV	[RISCV] Add support for printing pcrel immediates as absolute addresses in llvm-objdump	2020-12-04 10:34:12 -08:00
Sparc	…
SystemZ	[SystemZ] Add support for new cpu architecture - arch14	2021-07-26 16:57:28 +02:00
WebAssembly	[WebAssembly] Update v128.any_true	2021-04-11 11:13:16 -07:00
X86	[X86] AVX512FP16 instructions enabling 3/6	2021-08-18 09:03:41 +08:00
XCore	…