Mark Schimmel 7c82db3634 [ARC] Improve code generated for i32 ADDC/ADDE and SUBC/SUBE ... This change improves the code generated for long long addition and subtraction Differential Revision: https://reviews.llvm.org/D109615		2021-09-10 13:04:08 -07:00
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Disassembler	[ARC] Add codegen for the readcyclecounter intrinsic along with disassembly for associated instructions	2021-08-24 11:53:20 -07:00
MCTargetDesc	[ARC] Add disassembly for the conditioned move immediate instruction	2021-07-12 12:35:56 -07:00
TargetInfo	…
ARC.h	…
ARC.td	Add norm sub-target feature to table gen for ARC	2021-06-22 14:39:29 +03:00
ARCAsmPrinter.cpp	…
ARCBranchFinalize.cpp	[NFCI] Move DEBUG_TYPE definition below #includes	2021-05-30 17:31:01 +08:00
ARCCallingConv.td	…
ARCExpandPseudos.cpp	[ARC] Add codegen for count trailing zeros intrinsic for the ARC backend	2021-08-10 12:07:35 -07:00
ARCFrameLowering.cpp	[NFC][CodeGen] Tidy up TargetRegisterInfo stack realignment functions	2021-03-30 17:31:39 +01:00
ARCFrameLowering.h	…
ARCISelDAGToDAG.cpp	…
ARCISelLowering.cpp	[ARC] Improve code generated for i32 ADDC/ADDE and SUBC/SUBE	2021-09-10 13:04:08 -07:00
ARCISelLowering.h	[ARC] Add codegen for the readcyclecounter intrinsic along with disassembly for associated instructions	2021-08-24 11:53:20 -07:00
ARCInstrFormats.td	[ARC] Add codegen for the readcyclecounter intrinsic along with disassembly for associated instructions	2021-08-24 11:53:20 -07:00
ARCInstrInfo.cpp	…
ARCInstrInfo.h	…
ARCInstrInfo.td	[ARC] Improve code generated for i32 ADDC/ADDE and SUBC/SUBE	2021-09-10 13:04:08 -07:00
ARCMCInstLower.cpp	…
ARCMCInstLower.h	…
ARCMachineFunctionInfo.cpp	…
ARCMachineFunctionInfo.h	…
ARCOptAddrMode.cpp	…
ARCRegisterInfo.cpp	[ARC][NFC] Include file re-ordering	2021-07-09 12:20:32 -07:00
ARCRegisterInfo.h	…
ARCRegisterInfo.td	…
ARCSubtarget.cpp	…
ARCSubtarget.h	Add norm sub-target feature to table gen for ARC	2021-06-22 14:39:29 +03:00
ARCTargetMachine.cpp	…
ARCTargetMachine.h	…
ARCTargetStreamer.h	…
ARCTargetTransformInfo.h	…
CMakeLists.txt	…