llvm-project/llvm/test
Amara Emerson ca8316b704 [GlobalISel] Extend CombinerHelper::matchConstantOp() to match constant splat vectors.
This allows the "x op 0 -> x" fold to optimize vector constant RHSs.

Differential Revision: https://reviews.llvm.org/D110802
2021-09-30 14:31:25 -07:00
..
Analysis Revert "Recommit "[SCEV] Look through single value PHIs." (take 2)" 2021-09-30 20:53:51 +01:00
Assembler [ThinLTO] Add noRecurse and noUnwind thinlink function attribute propagation 2021-09-27 12:28:07 -07:00
Bindings
Bitcode [ThinLTO] Add noRecurse and noUnwind thinlink function attribute propagation 2021-09-27 12:28:07 -07:00
BugPoint
CodeGen [GlobalISel] Extend CombinerHelper::matchConstantOp() to match constant splat vectors. 2021-09-30 14:31:25 -07:00
DebugInfo [CodeView] Recognize Fortran95 as Fortran instead of MASM 2021-09-30 09:27:05 -04:00
Demangle
Examples [ORC] Temporarily remove the lljit-with-remote-debugging test. 2021-09-12 18:52:30 +10:00
ExecutionEngine [JITLink][MachO][x86-64] Add support for splitting compact-unwind sections. 2021-09-28 19:12:56 -07:00
Feature
FileCheck [FileCheck] Use StringRef for MatchRegexp to fix crash. 2021-09-01 14:27:14 +02:00
Instrumentation [AMDGPU] Require AMDGPU target for ASAN instrumentation tests 2021-09-29 10:52:27 +01:00
Integer
JitListener [IntelJITListener] Fix order in JitListener/multiple.ll 2021-09-29 16:46:09 -07:00
LTO Resolve {GlobalValue,GloalIndirectSymol}::getBaseObject confusion 2021-09-23 09:23:35 -07:00
Linker Copy Elementtype Attribute to IR at Link step 2021-09-07 11:41:43 -07:00
MC [RISCV] Remove Zbproposedc extension 2021-09-30 14:23:05 -07:00
MachineVerifier Revert @llvm.isnan intrinsic patchset. 2021-09-02 13:53:56 +03:00
Object
ObjectYAML [WebAssembly] Convert to new "dylink.0" section format 2021-09-12 05:30:38 -07:00
Other [ModuleInlinerWrapperPass] Do some naive printing of wrapped pipeline with -print-pipeline-passes 2021-09-23 09:54:42 +02:00
SafepointIRVerifier
Support
SymbolRewriter
TableGen [TableGen] Allow targets to entirely ignore Psets for registers 2021-09-23 23:07:35 -04:00
ThinLTO/X86 Reland [clang] Rework dontcall attributes 2021-09-28 15:31:30 -07:00
Transforms [cora async] Cleanup undefined llvm.coro.async.resume 2021-09-30 13:26:53 -07:00
Unit
Verifier [VP] Vector predicated vector splice intrinsic 2021-09-29 10:43:36 +02:00
YAMLParser
tools [llvm-objdump/llvm-readobj/obj2yaml/yaml2obj] Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC 2021-09-29 16:56:52 -07:00
.clang-format
CMakeLists.txt
TestRunner.sh
lit.cfg.py Add extra check for llvm::Any::TypeId visibility 2021-09-15 08:32:55 +02:00
lit.site.cfg.py.in Add extra check for llvm::Any::TypeId visibility 2021-09-15 08:32:55 +02:00