llvm-project/llvm/test/CodeGen
Simon Pilgrim 4171a91e92 [X86] combineVectorTruncationWithPACKUS - remove split/concatenation of mask
combineVectorTruncationWithPACKUS is currently splitting the upper bit bit masking into 128-bit subregs and then concatenating them back together.

This was originally done to avoid regressions that caused existing subregs to be concatenated to the larger type just for the AND masking before being extracted again. This was fixed by @spatel (notably rL303997 and rL347356).

This also lets SimplifyDemandedBits do some further improvements before it hits the recursive depth limit.

My only annoyance with this is that we were broadcasting some xmm masks but we seem to have lost them by moving to ymm - but that's a known issue as the logic in lowerBuildVectorAsBroadcast isn't great.

Differential Revision: https://reviews.llvm.org/D60375#inline-539623

llvm-svn: 358692
2019-04-18 17:23:09 +00:00
..
AArch64 [GlobalISel] Add legalization support for non-power-2 loads and stores 2019-04-17 21:30:07 +00:00
AMDGPU [AMDGPU] Avoid DAG combining assert with fneg(fadd(A,0)) 2019-04-18 05:27:01 +00:00
ARC [ARC] Add ARCOptAddrMode pass to generate postincrement loads/stores. 2019-03-20 20:06:21 +00:00
ARM [AsmPrinter] defer %c to base class for ARM, PPC, and Hexagon. NFC 2019-04-17 18:22:48 +00:00
AVR [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
BPF [BPF] add proper multi-dimensional array support 2019-03-28 21:59:49 +00:00
Generic Fix nondeterminism introduced in r353954 2019-03-26 12:18:08 +00:00
Hexagon [AsmPrinter] defer %c to base class for ARM, PPC, and Hexagon. NFC 2019-04-17 18:22:48 +00:00
Inputs
Lanai
MIR [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
MSP430 [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
Mips [GlobalISel] Enable CSE in the IRTranslator & legalizer for -O0 with constants only. 2019-04-15 05:04:20 +00:00
NVPTX [NVPTX] Fix the codegen for llvm.round. 2019-04-01 16:10:26 +00:00
PowerPC [PowerPC] Fix wrong ElemSIze when calling isConsecutiveLS() 2019-04-18 07:24:15 +00:00
RISCV [RISCV] Custom lower SHL_PARTS, SRA_PARTS, SRL_PARTS 2019-04-16 14:38:32 +00:00
SPARC [Sparc] Fix incorrect MI insertion position for spilling f128. 2019-04-10 01:56:32 +00:00
SystemZ Revert rL357745: [SelectionDAG] Compute known bits of CopyFromReg 2019-04-10 18:00:41 +00:00
Thumb [ARM] Add an extra constant hoisting test. NFC 2019-04-10 18:05:57 +00:00
Thumb2 [ARM] Add an extra test for constant hoist. NFC 2019-04-10 19:18:58 +00:00
WebAssembly [WebAssembly] Add mutable-globals to bleeding-edge CPU 2019-04-12 20:39:53 +00:00
WinCFGuard
WinEH Fix invalid target triples in tests. (NFC) 2019-03-04 23:37:41 +00:00
X86 [X86] combineVectorTruncationWithPACKUS - remove split/concatenation of mask 2019-04-18 17:23:09 +00:00
XCore [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00