60 lines
2.5 KiB
C++
60 lines
2.5 KiB
C++
//===- SPUCallingConv.td - Calling Conventions for CellSPU ------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This describes the calling conventions for the STI Cell SPU architecture.
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//
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//===----------------------------------------------------------------------===//
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/// CCIfSubtarget - Match if the current subtarget has a feature F.
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class CCIfSubtarget<string F, CCAction A>
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: CCIf<!strconcat("State.getTarget().getSubtarget<PPCSubtarget>().", F), A>;
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//===----------------------------------------------------------------------===//
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// Return Value Calling Convention
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//===----------------------------------------------------------------------===//
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// Return-value convention for Cell SPU: Everything can be passed back via $3:
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def RetCC_SPU : CallingConv<[
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CCIfType<[i32], CCAssignToReg<[R3]>>,
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CCIfType<[i64], CCAssignToReg<[R3]>>,
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CCIfType<[f32, f64], CCAssignToReg<[R3]>>,
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CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToReg<[R3]>>
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]>;
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//===----------------------------------------------------------------------===//
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// CellSPU Argument Calling Conventions
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// FIXME
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//===----------------------------------------------------------------------===//
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/*
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def CC_SPU : CallingConv<[
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// The first 8 integer arguments are passed in integer registers.
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CCIfType<[i32], CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10]>>,
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CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6, X7, X8, X9, X10]>>,
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// SPU can pass back arguments in all
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CCIfType<[f32, f64], CCIfSubtarget<"isMachoABI()",
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CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8,F9,F10,F11,F12,F13]>>>,
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// Other sub-targets pass FP values in F1-10.
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CCIfType<[f32, f64], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8, F9,F10]>>,
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// The first 12 Vector arguments are passed in altivec registers.
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CCIfType<[v16i8, v8i16, v4i32, v4f32],
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CCAssignToReg<[V2, V3, V4, V5, V6, V7, V8, V9, V10,V11,V12,V13]>>
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/*
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// Integer/FP values get stored in stack slots that are 8 bytes in size and
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// 8-byte aligned if there are no more registers to hold them.
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CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>,
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// Vectors get 16-byte stack slots that are 16-byte aligned.
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CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
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CCAssignToStack<16, 16>>*/
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]>;
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*/
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