70 lines
3.2 KiB
LLVM
70 lines
3.2 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefixes=CHECK,NOHSA %s
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; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefixes=CHECK,HSA %s
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; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefixes=CHECK,HSA %s
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@lds0 = addrspace(3) global [512 x float] undef, align 4
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@lds1 = addrspace(3) global [256 x float] undef, align 4
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@large = addrspace(3) global [4096 x i32] undef, align 4
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; CHECK-LABEL: {{^}}groupstaticsize_test0:
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; NOHSA: v_mov_b32_e32 v{{[0-9]+}}, llvm.amdgcn.groupstaticsize@abs32@lo
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; HSA: v_mov_b32_e32 v{{[0-9]+}}, 0x800{{$}}
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define amdgpu_kernel void @groupstaticsize_test0(float addrspace(1)* %out, i32 addrspace(1)* %lds_size) #0 {
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%tid.x = tail call i32 @llvm.amdgcn.workitem.id.x() #1
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%idx.0 = add nsw i32 %tid.x, 64
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%static_lds_size = call i32 @llvm.amdgcn.groupstaticsize() #1
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store i32 %static_lds_size, i32 addrspace(1)* %lds_size, align 4
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%arrayidx0 = getelementptr inbounds [512 x float], [512 x float] addrspace(3)* @lds0, i32 0, i32 %idx.0
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%val0 = load float, float addrspace(3)* %arrayidx0, align 4
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store float %val0, float addrspace(1)* %out, align 4
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ret void
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}
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; CHECK-LABEL: {{^}}groupstaticsize_test1:
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; NOHSA: v_mov_b32_e32 v{{[0-9]+}}, llvm.amdgcn.groupstaticsize@abs32@lo
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; HSA: v_mov_b32_e32 v{{[0-9]+}}, 0xc00{{$}}
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define amdgpu_kernel void @groupstaticsize_test1(float addrspace(1)* %out, i32 %cond, i32 addrspace(1)* %lds_size) {
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entry:
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%static_lds_size = call i32 @llvm.amdgcn.groupstaticsize() #1
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store i32 %static_lds_size, i32 addrspace(1)* %lds_size, align 4
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%tid.x = tail call i32 @llvm.amdgcn.workitem.id.x() #1
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%idx.0 = add nsw i32 %tid.x, 64
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%tmp = icmp eq i32 %cond, 0
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br i1 %tmp, label %if, label %else
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if: ; preds = %entry
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%arrayidx0 = getelementptr inbounds [512 x float], [512 x float] addrspace(3)* @lds0, i32 0, i32 %idx.0
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%val0 = load float, float addrspace(3)* %arrayidx0, align 4
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store float %val0, float addrspace(1)* %out, align 4
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br label %endif
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else: ; preds = %entry
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%arrayidx1 = getelementptr inbounds [256 x float], [256 x float] addrspace(3)* @lds1, i32 0, i32 %idx.0
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%val1 = load float, float addrspace(3)* %arrayidx1, align 4
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store float %val1, float addrspace(1)* %out, align 4
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br label %endif
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endif: ; preds = %else, %if
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ret void
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}
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; Exceeds 16-bit simm limit of s_movk_i32
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; CHECK-LABEL: {{^}}large_groupstaticsize:
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; NOHSA: v_mov_b32_e32 v{{[0-9]+}}, llvm.amdgcn.groupstaticsize@abs32@lo
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; HSA: v_mov_b32_e32 [[REG:v[0-9]+]], 0x4000{{$}}
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define amdgpu_kernel void @large_groupstaticsize(i32 addrspace(1)* %size, i32 %idx) #0 {
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%gep = getelementptr inbounds [4096 x i32], [4096 x i32] addrspace(3)* @large, i32 0, i32 %idx
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store volatile i32 0, i32 addrspace(3)* %gep
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%static_lds_size = call i32 @llvm.amdgcn.groupstaticsize()
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store i32 %static_lds_size, i32 addrspace(1)* %size
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ret void
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}
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declare i32 @llvm.amdgcn.groupstaticsize() #1
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declare i32 @llvm.amdgcn.workitem.id.x() #1
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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