85 lines
3.6 KiB
LLVM
85 lines
3.6 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,W64 %s
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; RUN: llc -march=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,W32 %s
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; RUN: llc -march=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,W64 %s
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; RUN: opt -O3 -S < %s | FileCheck -check-prefixes=OPT,OPT-WXX %s
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; RUN: opt -mtriple=amdgcn-- -O3 -S < %s | FileCheck -check-prefixes=OPT,OPT-WXX %s
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; RUN: opt -mtriple=amdgcn-- -O3 -mattr=+WavefrontSize32 -S < %s | FileCheck -check-prefixes=OPT,OPT-W32 %s
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; RUN: opt -mtriple=amdgcn-- -O3 -mattr=+WavefrontSize64 -S < %s | FileCheck -check-prefixes=OPT,OPT-W64 %s
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; RUN: opt -mtriple=amdgcn-- -mcpu=tonga -O3 -S < %s | FileCheck -check-prefixes=OPT,OPT-W64 %s
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; RUN: opt -mtriple=amdgcn-- -mcpu=gfx1010 -O3 -mattr=+wavefrontsize32,-wavefrontsize64 -S < %s | FileCheck -check-prefixes=OPT,OPT-W32 %s
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; RUN: opt -mtriple=amdgcn-- -mcpu=gfx1010 -O3 -mattr=-wavefrontsize32,+wavefrontsize64 -S < %s | FileCheck -check-prefixes=OPT,OPT-W64 %s
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; GCN-LABEL: {{^}}fold_wavefrontsize:
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; OPT-LABEL: define amdgpu_kernel void @fold_wavefrontsize(
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; W32: v_mov_b32_e32 [[V:v[0-9]+]], 32
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; W64: v_mov_b32_e32 [[V:v[0-9]+]], 64
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; GCN: store_dword v[{{[0-9:]+}}], [[V]]
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; OPT-W32: store i32 32, i32 addrspace(1)* %arg, align 4
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; OPT-W64: store i32 64, i32 addrspace(1)* %arg, align 4
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; OPT-WXX: %tmp = tail call i32 @llvm.amdgcn.wavefrontsize()
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; OPT-WXX: store i32 %tmp, i32 addrspace(1)* %arg, align 4
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; OPT-NEXT: ret void
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define amdgpu_kernel void @fold_wavefrontsize(i32 addrspace(1)* nocapture %arg) {
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bb:
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%tmp = tail call i32 @llvm.amdgcn.wavefrontsize() #0
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store i32 %tmp, i32 addrspace(1)* %arg, align 4
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ret void
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}
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; GCN-LABEL: {{^}}fold_and_optimize_wavefrontsize:
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; OPT-LABEL: define amdgpu_kernel void @fold_and_optimize_wavefrontsize(
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; W32: v_mov_b32_e32 [[V:v[0-9]+]], 1{{$}}
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; W64: v_mov_b32_e32 [[V:v[0-9]+]], 2{{$}}
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; GCN-NOT: cndmask
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; GCN: store_dword v[{{[0-9:]+}}], [[V]]
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; OPT-W32: store i32 1, i32 addrspace(1)* %arg, align 4
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; OPT-W64: store i32 2, i32 addrspace(1)* %arg, align 4
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; OPT-WXX: %tmp = tail call i32 @llvm.amdgcn.wavefrontsize()
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; OPT-WXX: %tmp1 = icmp ugt i32 %tmp, 32
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; OPT-WXX: %tmp2 = select i1 %tmp1, i32 2, i32 1
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; OPT-WXX: store i32 %tmp2, i32 addrspace(1)* %arg
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; OPT-NEXT: ret void
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define amdgpu_kernel void @fold_and_optimize_wavefrontsize(i32 addrspace(1)* nocapture %arg) {
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bb:
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%tmp = tail call i32 @llvm.amdgcn.wavefrontsize() #0
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%tmp1 = icmp ugt i32 %tmp, 32
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%tmp2 = select i1 %tmp1, i32 2, i32 1
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store i32 %tmp2, i32 addrspace(1)* %arg
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ret void
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}
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; GCN-LABEL: {{^}}fold_and_optimize_if_wavefrontsize:
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; OPT-LABEL: define amdgpu_kernel void @fold_and_optimize_if_wavefrontsize(
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; OPT: bb:
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; OPT-WXX: %tmp = tail call i32 @llvm.amdgcn.wavefrontsize()
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; OPT-WXX: %tmp1 = icmp ugt i32 %tmp, 32
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; OPT-WXX: bb3:
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; OPT-W64: store i32 1, i32 addrspace(1)* %arg, align 4
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; OPT-NEXT: ret void
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define amdgpu_kernel void @fold_and_optimize_if_wavefrontsize(i32 addrspace(1)* nocapture %arg) {
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bb:
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%tmp = tail call i32 @llvm.amdgcn.wavefrontsize() #0
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%tmp1 = icmp ugt i32 %tmp, 32
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br i1 %tmp1, label %bb2, label %bb3
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bb2: ; preds = %bb
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store i32 1, i32 addrspace(1)* %arg, align 4
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br label %bb3
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bb3: ; preds = %bb2, %bb
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ret void
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}
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declare i32 @llvm.amdgcn.wavefrontsize() #0
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attributes #0 = { nounwind readnone speculatable }
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