66 lines
2.8 KiB
LLVM
66 lines
2.8 KiB
LLVM
; RUN: opt -S -mtriple=amdgcn-- -data-layout=A5 -amdgpu-promote-alloca -sroa -instcombine < %s | FileCheck -check-prefix=OPT %s
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; Show that what the alloca promotion pass will do for non-atomic load/store.
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; OPT-LABEL: @vector_alloca_not_atomic(
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;
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; OPT: extractelement <3 x i32> <i32 0, i32 1, i32 2>, i64 %index
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define amdgpu_kernel void @vector_alloca_not_atomic(i32 addrspace(1)* %out, i64 %index) {
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entry:
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%alloca = alloca [3 x i32], addrspace(5)
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%a0 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 0
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%a1 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 1
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%a2 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 2
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store i32 0, i32 addrspace(5)* %a0
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store i32 1, i32 addrspace(5)* %a1
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store i32 2, i32 addrspace(5)* %a2
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%tmp = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i64 0, i64 %index
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%data = load i32, i32 addrspace(5)* %tmp
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store i32 %data, i32 addrspace(1)* %out
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ret void
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}
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; OPT-LABEL: @vector_alloca_atomic_read(
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;
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; OPT: alloca [3 x i32]
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; OPT: store i32 0, i32 addrspace(5)*
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; OPT: store i32 1, i32 addrspace(5)*
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; OPT: store i32 2, i32 addrspace(5)*
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; OPT: load atomic i32, i32 addrspace(5)*
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define amdgpu_kernel void @vector_alloca_atomic_read(i32 addrspace(1)* %out, i64 %index) {
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entry:
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%alloca = alloca [3 x i32], addrspace(5)
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%a0 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 0
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%a1 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 1
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%a2 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 2
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store i32 0, i32 addrspace(5)* %a0
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store i32 1, i32 addrspace(5)* %a1
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store i32 2, i32 addrspace(5)* %a2
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%tmp = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i64 0, i64 %index
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%data = load atomic i32, i32 addrspace(5)* %tmp acquire, align 4
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store i32 %data, i32 addrspace(1)* %out
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ret void
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}
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; OPT-LABEL: @vector_alloca_atomic_write(
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;
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; OPT: alloca [3 x i32]
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; OPT: store atomic i32 0, i32 addrspace(5)
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; OPT: store atomic i32 1, i32 addrspace(5)
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; OPT: store atomic i32 2, i32 addrspace(5)
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; OPT: load i32, i32 addrspace(5)*
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define amdgpu_kernel void @vector_alloca_atomic_write(i32 addrspace(1)* %out, i64 %index) {
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entry:
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%alloca = alloca [3 x i32], addrspace(5)
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%a0 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 0
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%a1 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 1
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%a2 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 2
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store atomic i32 0, i32 addrspace(5)* %a0 release, align 4
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store atomic i32 1, i32 addrspace(5)* %a1 release, align 4
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store atomic i32 2, i32 addrspace(5)* %a2 release, align 4
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%tmp = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i64 0, i64 %index
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%data = load i32, i32 addrspace(5)* %tmp
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store i32 %data, i32 addrspace(1)* %out
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ret void
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}
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