197 lines
6.3 KiB
LLVM
197 lines
6.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -relocation-model=pic < %s \
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; RUN: | FileCheck -check-prefix=RV32-PIC %s
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; RUN: llc -mtriple=riscv64 -relocation-model=pic < %s \
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; RUN: | FileCheck -check-prefix=RV64-PIC %s
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; RUN: llc -mtriple=riscv32 < %s | FileCheck -check-prefix=RV32-NOPIC %s
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; RUN: llc -mtriple=riscv64 < %s | FileCheck -check-prefix=RV64-NOPIC %s
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; Check that TLS symbols are lowered correctly based on the specified
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; model. Make sure they're external to avoid them all being optimised to Local
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; Exec for the executable.
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@unspecified = external thread_local global i32
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@ld = external thread_local(localdynamic) global i32
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@ie = external thread_local(initialexec) global i32
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@le = external thread_local(localexec) global i32
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; No model specified
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define i32* @f1() nounwind {
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; RV32-PIC-LABEL: f1:
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; RV32-PIC: # %bb.0: # %entry
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; RV32-PIC-NEXT: addi sp, sp, -16
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; RV32-PIC-NEXT: sw ra, 12(sp)
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; RV32-PIC-NEXT: .LBB0_1: # %entry
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; RV32-PIC-NEXT: # Label of block must be emitted
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; RV32-PIC-NEXT: auipc a0, %tls_gd_pcrel_hi(unspecified)
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; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB0_1)
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; RV32-PIC-NEXT: call __tls_get_addr@plt
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; RV32-PIC-NEXT: lw ra, 12(sp)
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; RV32-PIC-NEXT: addi sp, sp, 16
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; RV32-PIC-NEXT: ret
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;
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; RV64-PIC-LABEL: f1:
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; RV64-PIC: # %bb.0: # %entry
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; RV64-PIC-NEXT: addi sp, sp, -16
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; RV64-PIC-NEXT: sd ra, 8(sp)
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; RV64-PIC-NEXT: .LBB0_1: # %entry
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; RV64-PIC-NEXT: # Label of block must be emitted
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; RV64-PIC-NEXT: auipc a0, %tls_gd_pcrel_hi(unspecified)
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; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB0_1)
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; RV64-PIC-NEXT: call __tls_get_addr@plt
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; RV64-PIC-NEXT: ld ra, 8(sp)
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; RV64-PIC-NEXT: addi sp, sp, 16
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; RV64-PIC-NEXT: ret
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;
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; RV32-NOPIC-LABEL: f1:
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; RV32-NOPIC: # %bb.0: # %entry
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; RV32-NOPIC-NEXT: .LBB0_1: # %entry
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; RV32-NOPIC-NEXT: # Label of block must be emitted
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; RV32-NOPIC-NEXT: auipc a0, %tls_ie_pcrel_hi(unspecified)
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; RV32-NOPIC-NEXT: lw a0, %pcrel_lo(.LBB0_1)(a0)
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; RV32-NOPIC-NEXT: add a0, a0, tp
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; RV32-NOPIC-NEXT: ret
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;
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; RV64-NOPIC-LABEL: f1:
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; RV64-NOPIC: # %bb.0: # %entry
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; RV64-NOPIC-NEXT: .LBB0_1: # %entry
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; RV64-NOPIC-NEXT: # Label of block must be emitted
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; RV64-NOPIC-NEXT: auipc a0, %tls_ie_pcrel_hi(unspecified)
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; RV64-NOPIC-NEXT: ld a0, %pcrel_lo(.LBB0_1)(a0)
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; RV64-NOPIC-NEXT: add a0, a0, tp
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; RV64-NOPIC-NEXT: ret
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entry:
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ret i32* @unspecified
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}
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; localdynamic specified
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define i32* @f2() nounwind {
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; RV32-PIC-LABEL: f2:
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; RV32-PIC: # %bb.0: # %entry
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; RV32-PIC-NEXT: addi sp, sp, -16
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; RV32-PIC-NEXT: sw ra, 12(sp)
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; RV32-PIC-NEXT: .LBB1_1: # %entry
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; RV32-PIC-NEXT: # Label of block must be emitted
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; RV32-PIC-NEXT: auipc a0, %tls_gd_pcrel_hi(ld)
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; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB1_1)
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; RV32-PIC-NEXT: call __tls_get_addr@plt
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; RV32-PIC-NEXT: lw ra, 12(sp)
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; RV32-PIC-NEXT: addi sp, sp, 16
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; RV32-PIC-NEXT: ret
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;
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; RV64-PIC-LABEL: f2:
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; RV64-PIC: # %bb.0: # %entry
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; RV64-PIC-NEXT: addi sp, sp, -16
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; RV64-PIC-NEXT: sd ra, 8(sp)
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; RV64-PIC-NEXT: .LBB1_1: # %entry
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; RV64-PIC-NEXT: # Label of block must be emitted
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; RV64-PIC-NEXT: auipc a0, %tls_gd_pcrel_hi(ld)
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; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB1_1)
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; RV64-PIC-NEXT: call __tls_get_addr@plt
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; RV64-PIC-NEXT: ld ra, 8(sp)
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; RV64-PIC-NEXT: addi sp, sp, 16
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; RV64-PIC-NEXT: ret
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;
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; RV32-NOPIC-LABEL: f2:
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; RV32-NOPIC: # %bb.0: # %entry
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; RV32-NOPIC-NEXT: .LBB1_1: # %entry
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; RV32-NOPIC-NEXT: # Label of block must be emitted
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; RV32-NOPIC-NEXT: auipc a0, %tls_ie_pcrel_hi(ld)
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; RV32-NOPIC-NEXT: lw a0, %pcrel_lo(.LBB1_1)(a0)
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; RV32-NOPIC-NEXT: add a0, a0, tp
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; RV32-NOPIC-NEXT: ret
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;
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; RV64-NOPIC-LABEL: f2:
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; RV64-NOPIC: # %bb.0: # %entry
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; RV64-NOPIC-NEXT: .LBB1_1: # %entry
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; RV64-NOPIC-NEXT: # Label of block must be emitted
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; RV64-NOPIC-NEXT: auipc a0, %tls_ie_pcrel_hi(ld)
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; RV64-NOPIC-NEXT: ld a0, %pcrel_lo(.LBB1_1)(a0)
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; RV64-NOPIC-NEXT: add a0, a0, tp
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; RV64-NOPIC-NEXT: ret
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entry:
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ret i32* @ld
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}
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; initialexec specified
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define i32* @f3() nounwind {
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; RV32-PIC-LABEL: f3:
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; RV32-PIC: # %bb.0: # %entry
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; RV32-PIC-NEXT: .LBB2_1: # %entry
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; RV32-PIC-NEXT: # Label of block must be emitted
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; RV32-PIC-NEXT: auipc a0, %tls_ie_pcrel_hi(ie)
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; RV32-PIC-NEXT: lw a0, %pcrel_lo(.LBB2_1)(a0)
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; RV32-PIC-NEXT: add a0, a0, tp
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; RV32-PIC-NEXT: ret
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;
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; RV64-PIC-LABEL: f3:
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; RV64-PIC: # %bb.0: # %entry
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; RV64-PIC-NEXT: .LBB2_1: # %entry
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; RV64-PIC-NEXT: # Label of block must be emitted
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; RV64-PIC-NEXT: auipc a0, %tls_ie_pcrel_hi(ie)
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; RV64-PIC-NEXT: ld a0, %pcrel_lo(.LBB2_1)(a0)
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; RV64-PIC-NEXT: add a0, a0, tp
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; RV64-PIC-NEXT: ret
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;
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; RV32-NOPIC-LABEL: f3:
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; RV32-NOPIC: # %bb.0: # %entry
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; RV32-NOPIC-NEXT: .LBB2_1: # %entry
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; RV32-NOPIC-NEXT: # Label of block must be emitted
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; RV32-NOPIC-NEXT: auipc a0, %tls_ie_pcrel_hi(ie)
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; RV32-NOPIC-NEXT: lw a0, %pcrel_lo(.LBB2_1)(a0)
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; RV32-NOPIC-NEXT: add a0, a0, tp
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; RV32-NOPIC-NEXT: ret
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;
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; RV64-NOPIC-LABEL: f3:
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; RV64-NOPIC: # %bb.0: # %entry
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; RV64-NOPIC-NEXT: .LBB2_1: # %entry
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; RV64-NOPIC-NEXT: # Label of block must be emitted
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; RV64-NOPIC-NEXT: auipc a0, %tls_ie_pcrel_hi(ie)
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; RV64-NOPIC-NEXT: ld a0, %pcrel_lo(.LBB2_1)(a0)
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; RV64-NOPIC-NEXT: add a0, a0, tp
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; RV64-NOPIC-NEXT: ret
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entry:
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ret i32* @ie
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}
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; localexec specified
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define i32* @f4() nounwind {
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; RV32-PIC-LABEL: f4:
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; RV32-PIC: # %bb.0: # %entry
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; RV32-PIC-NEXT: lui a0, %tprel_hi(le)
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; RV32-PIC-NEXT: add a0, a0, tp, %tprel_add(le)
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; RV32-PIC-NEXT: addi a0, a0, %tprel_lo(le)
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; RV32-PIC-NEXT: ret
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;
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; RV64-PIC-LABEL: f4:
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; RV64-PIC: # %bb.0: # %entry
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; RV64-PIC-NEXT: lui a0, %tprel_hi(le)
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; RV64-PIC-NEXT: add a0, a0, tp, %tprel_add(le)
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; RV64-PIC-NEXT: addi a0, a0, %tprel_lo(le)
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; RV64-PIC-NEXT: ret
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;
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; RV32-NOPIC-LABEL: f4:
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; RV32-NOPIC: # %bb.0: # %entry
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; RV32-NOPIC-NEXT: lui a0, %tprel_hi(le)
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; RV32-NOPIC-NEXT: add a0, a0, tp, %tprel_add(le)
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; RV32-NOPIC-NEXT: addi a0, a0, %tprel_lo(le)
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; RV32-NOPIC-NEXT: ret
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;
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; RV64-NOPIC-LABEL: f4:
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; RV64-NOPIC: # %bb.0: # %entry
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; RV64-NOPIC-NEXT: lui a0, %tprel_hi(le)
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; RV64-NOPIC-NEXT: add a0, a0, tp, %tprel_add(le)
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; RV64-NOPIC-NEXT: addi a0, a0, %tprel_lo(le)
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; RV64-NOPIC-NEXT: ret
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entry:
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ret i32* @le
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}
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