72 lines
2.2 KiB
LLVM
72 lines
2.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
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define i128 @mulhioverflow(i64 %a, i64 %b, i64 %c) nounwind {
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; X32-LABEL: mulhioverflow:
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; X32: # %bb.0:
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; X32-NEXT: pushl %ebp
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; X32-NEXT: pushl %ebx
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; X32-NEXT: pushl %edi
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; X32-NEXT: pushl %esi
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; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl %esi, %eax
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; X32-NEXT: mull %ebx
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; X32-NEXT: movl %edx, %edi
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; X32-NEXT: movl %ebp, %eax
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; X32-NEXT: mull %ebx
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; X32-NEXT: movl %edx, %ebx
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; X32-NEXT: movl %eax, %ebp
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; X32-NEXT: addl %edi, %ebp
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; X32-NEXT: adcl $0, %ebx
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; X32-NEXT: movl %esi, %eax
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; X32-NEXT: mull %ecx
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; X32-NEXT: movl %edx, %esi
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; X32-NEXT: addl %ebp, %eax
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; X32-NEXT: adcl %ebx, %esi
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; X32-NEXT: setb %bl
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: mull %ecx
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; X32-NEXT: addl %esi, %eax
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; X32-NEXT: movzbl %bl, %ecx
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; X32-NEXT: adcl %ecx, %edx
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: andl $1, %ecx
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; X32-NEXT: addl %eax, %ecx
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl %ecx, (%eax)
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; X32-NEXT: adcl $0, %edx
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; X32-NEXT: movl %edx, 4(%eax)
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; X32-NEXT: setb %cl
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; X32-NEXT: movzbl %cl, %ecx
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; X32-NEXT: movl %ecx, 8(%eax)
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; X32-NEXT: movl $0, 12(%eax)
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; X32-NEXT: popl %esi
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; X32-NEXT: popl %edi
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; X32-NEXT: popl %ebx
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; X32-NEXT: popl %ebp
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; X32-NEXT: retl $4
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;
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; X64-LABEL: mulhioverflow:
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; X64: # %bb.0:
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; X64-NEXT: movq %rdx, %rcx
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: mulq %rsi
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; X64-NEXT: andl $1, %ecx
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; X64-NEXT: addq %rdx, %rcx
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; X64-NEXT: movq %rcx, %rax
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: retq
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%1 = zext i64 %a to i128
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%2 = zext i64 %b to i128
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%3 = mul i128 %1, %2
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%4 = lshr i128 %3, 64
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%5 = and i64 %c, 1
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%6 = zext i64 %5 to i128
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%7 = add i128 %4, %6
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ret i128 %7
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}
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