162 lines
4.4 KiB
LLVM
162 lines
4.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -indvars -instcombine -S < %s | FileCheck %s
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;; Test that loop's exit value is rewritten to its initial
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;; value from loop preheader
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define i32 @test1(i32* %var) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[COND:%.*]] = icmp eq i32* [[VAR:%.*]], null
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; CHECK-NEXT: br label [[HEADER:%.*]]
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; CHECK: header:
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; CHECK-NEXT: br i1 [[COND]], label [[LOOP:%.*]], label [[EXIT:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: br label [[HEADER]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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%cond = icmp eq i32* %var, null
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br label %header
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header:
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%phi_indvar = phi i32 [0, %entry], [%indvar, %loop]
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br i1 %cond, label %loop, label %exit
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loop:
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%indvar = add i32 %phi_indvar, 1
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br label %header
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exit:
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ret i32 %phi_indvar
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}
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;; Test that we can not rewrite loop exit value if it's not
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;; a phi node (%indvar is an add instruction in this test).
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define i32 @test2(i32* %var) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[COND:%.*]] = icmp eq i32* [[VAR:%.*]], null
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; CHECK-NEXT: br label [[HEADER:%.*]]
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; CHECK: header:
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; CHECK-NEXT: [[PHI_INDVAR:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INDVAR:%.*]], [[HEADER]] ]
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; CHECK-NEXT: [[INDVAR]] = add i32 [[PHI_INDVAR]], 1
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; CHECK-NEXT: br i1 [[COND]], label [[HEADER]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 [[INDVAR]]
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;
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entry:
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%cond = icmp eq i32* %var, null
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br label %header
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header:
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%phi_indvar = phi i32 [0, %entry], [%indvar, %header]
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%indvar = add i32 %phi_indvar, 1
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br i1 %cond, label %header, label %exit
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exit:
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ret i32 %indvar
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}
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;; Test that we can not rewrite loop exit value if the condition
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;; is not in loop header.
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define i32 @test3(i32* %var) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[COND1:%.*]] = icmp eq i32* [[VAR:%.*]], null
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; CHECK-NEXT: br label [[HEADER:%.*]]
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; CHECK: header:
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; CHECK-NEXT: [[PHI_INDVAR:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INDVAR:%.*]], [[HEADER_BACKEDGE:%.*]] ]
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; CHECK-NEXT: [[INDVAR]] = add i32 [[PHI_INDVAR]], 1
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; CHECK-NEXT: [[COND2:%.*]] = icmp eq i32 [[INDVAR]], 10
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; CHECK-NEXT: br i1 [[COND2]], label [[HEADER_BACKEDGE]], label [[BODY:%.*]]
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; CHECK: header.backedge:
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; CHECK-NEXT: br label [[HEADER]]
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; CHECK: body:
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; CHECK-NEXT: br i1 [[COND1]], label [[HEADER_BACKEDGE]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 [[PHI_INDVAR]]
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;
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entry:
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%cond1 = icmp eq i32* %var, null
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br label %header
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header:
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%phi_indvar = phi i32 [0, %entry], [%indvar, %header], [%indvar, %body]
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%indvar = add i32 %phi_indvar, 1
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%cond2 = icmp eq i32 %indvar, 10
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br i1 %cond2, label %header, label %body
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body:
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br i1 %cond1, label %header, label %exit
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exit:
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ret i32 %phi_indvar
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}
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; Multiple exits dominating latch
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define i32 @test4(i1 %cond1, i1 %cond2) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[HEADER:%.*]]
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; CHECK: header:
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; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP:%.*]], label [[EXIT:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: br i1 [[COND2:%.*]], label [[HEADER]], label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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br label %header
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header:
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%phi_indvar = phi i32 [0, %entry], [%indvar, %loop]
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br i1 %cond1, label %loop, label %exit
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loop:
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%indvar = add i32 %phi_indvar, 1
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br i1 %cond2, label %header, label %exit
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exit:
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ret i32 %phi_indvar
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}
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; A conditionally executed exit.
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define i32 @test5(i1* %addr, i1 %cond2) {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[HEADER:%.*]]
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; CHECK: header:
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; CHECK-NEXT: [[PHI_INDVAR:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INDVAR:%.*]], [[LOOP:%.*]] ]
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; CHECK-NEXT: [[COND1:%.*]] = load volatile i1, i1* [[ADDR:%.*]], align 1
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; CHECK-NEXT: br i1 [[COND1]], label [[LOOP]], label [[MAYBE:%.*]]
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; CHECK: maybe:
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; CHECK-NEXT: br i1 [[COND2:%.*]], label [[LOOP]], label [[EXIT:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[INDVAR]] = add i32 [[PHI_INDVAR]], 1
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; CHECK-NEXT: br label [[HEADER]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 [[PHI_INDVAR]]
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;
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entry:
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br label %header
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header:
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%phi_indvar = phi i32 [0, %entry], [%indvar, %loop]
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%cond1 = load volatile i1, i1* %addr
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br i1 %cond1, label %loop, label %maybe
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maybe:
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br i1 %cond2, label %loop, label %exit
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loop:
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%indvar = add i32 %phi_indvar, 1
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br label %header
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exit:
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ret i32 %phi_indvar
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}
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