91 lines
3.0 KiB
C++
91 lines
3.0 KiB
C++
//===--------------------- SummaryView.h ------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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/// \file
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///
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/// This file implements the summary view.
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///
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/// The goal of the summary view is to give a very quick overview of the
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/// performance throughput. Below is an example of summary view:
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///
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///
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/// Iterations: 300
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/// Instructions: 900
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/// Total Cycles: 610
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/// Dispatch Width: 2
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/// IPC: 1.48
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/// Block RThroughput: 2.0
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///
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/// The summary view collects a few performance numbers. The two main
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/// performance indicators are 'Total Cycles' and IPC (Instructions Per Cycle).
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TOOLS_LLVM_MCA_SUMMARYVIEW_H
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#define LLVM_TOOLS_LLVM_MCA_SUMMARYVIEW_H
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/MC/MCSchedule.h"
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#include "llvm/MCA/View.h"
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#include "llvm/Support/raw_ostream.h"
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namespace llvm {
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namespace mca {
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/// A view that collects and prints a few performance numbers.
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class SummaryView : public View {
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const llvm::MCSchedModel &SM;
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llvm::ArrayRef<llvm::MCInst> Source;
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const unsigned DispatchWidth;
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unsigned LastInstructionIdx;
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unsigned TotalCycles;
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// The total number of micro opcodes contributed by a block of instructions.
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unsigned NumMicroOps;
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struct DisplayValues {
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unsigned Instructions;
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unsigned Iterations;
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unsigned TotalInstructions;
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unsigned TotalCycles;
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unsigned DispatchWidth;
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unsigned TotalUOps;
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double IPC;
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double UOpsPerCycle;
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double BlockRThroughput;
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};
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// For each processor resource, this vector stores the cumulative number of
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// resource cycles consumed by the analyzed code block.
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llvm::SmallVector<unsigned, 8> ProcResourceUsage;
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// Each processor resource is associated with a so-called processor resource
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// mask. This vector allows to correlate processor resource IDs with processor
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// resource masks. There is exactly one element per each processor resource
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// declared by the scheduling model.
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llvm::SmallVector<uint64_t, 8> ProcResourceMasks;
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// Used to map resource indices to actual processor resource IDs.
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llvm::SmallVector<unsigned, 8> ResIdx2ProcResID;
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/// Compute the data we want to print out in the object DV.
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void collectData(DisplayValues &DV) const;
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public:
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SummaryView(const llvm::MCSchedModel &Model, llvm::ArrayRef<llvm::MCInst> S,
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unsigned Width);
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void onCycleEnd() override { ++TotalCycles; }
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void onEvent(const HWInstructionEvent &Event) override;
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void printView(llvm::raw_ostream &OS) const override;
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StringRef getNameAsString() const override { return "SummaryView"; }
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json::Value toJSON() const override;
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};
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} // namespace mca
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} // namespace llvm
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#endif
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