Xiang1 Zhang aded4f0cc0 [X86-64] Support Intel AMX instructions ... Summary: INTEL ADVANCED MATRIX EXTENSIONS (AMX). AMX is a new programming paradigm, it has a set of 2-dimensional registers (TILES) representing sub-arrays from a larger 2-dimensional memory image and operate on TILES. Spec can be found in Chapter 3 here https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html Reviewers: LuoYuanke, annita.zhang, pengfei, RKSimon, xiangzhangllvm Reviewed By: xiangzhangllvm Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D82705		2020-07-02 08:57:04 +08:00
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AMX	[X86-64] Support Intel AMX instructions	2020-07-02 08:57:04 +08:00
amd3dnow.txt	…
avx-512.txt	…
avx512-vp2intersect-32-att.txt	…
avx512-vp2intersect-64-att.txt	…
avx512_vp2intersect-32-intel.txt	…
avx512_vp2intersect-64-intel.txt	…
avx512bf16-att.txt	…
avx512bf16-intel.txt	…
avx512bf16vl-att.txt	…
avx512bf16vl-intel.txt	…
avx512vp2intersectvl-att.txt	…
avx512vp2intersectvl-intel.txt	…
fp-stack.txt	…
gather-novsib.txt	…
hex-immediates.txt	…
intel-syntax-32.txt	…
intel-syntax.txt	…
invalid-EVEX-R2.txt	…
invalid-VEX-vvvv-32.txt	…
invalid-VEX-vvvv.txt	…
lit.local.cfg	…
marked-up.txt	…
missing-sib.txt	…
moffs.txt	…
padlock.txt	…
prefixes-i386.txt	…
prefixes-x86_64.txt	…
prefixes.txt	…
simple-tests.txt	…
truncated-input.txt	…
x86-16.txt	[X86] Correct the implementation of ud1(a.k.a. ud2b) instruction.	2020-06-19 23:57:48 -07:00
x86-32.txt	[X86] Ignore bits 2:0 of the modrm byte when disassembling lfence, mfence, and sfence.	2020-06-19 22:24:24 -07:00
x86-64-avx512bf16-att.txt	…
x86-64-avx512bf16-intel.txt	…
x86-64-avx512bf16vl-att.txt	…
x86-64-avx512bf16vl-intel.txt	…
x86-64-avx512vp2intersectvl-att.txt	…
x86-64-avx512vp2intersectvl-intel.txt	…
x86-64-err.txt	…
x86-64.txt	…