225 lines
7.3 KiB
C++
225 lines
7.3 KiB
C++
//===-- VEAsmBackend.cpp - VE Assembler Backend ---------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/VEFixupKinds.h"
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#include "MCTargetDesc/VEMCTargetDesc.h"
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#include "llvm/MC/MCAsmBackend.h"
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#include "llvm/MC/MCELFObjectWriter.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCFixupKindInfo.h"
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#include "llvm/MC/MCObjectWriter.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Support/EndianStream.h"
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#include "llvm/Support/TargetRegistry.h"
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using namespace llvm;
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static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) {
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switch (Kind) {
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default:
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llvm_unreachable("Unknown fixup kind!");
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case FK_Data_1:
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case FK_Data_2:
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case FK_Data_4:
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case FK_Data_8:
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case FK_PCRel_1:
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case FK_PCRel_2:
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case FK_PCRel_4:
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case FK_PCRel_8:
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return Value;
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case VE::fixup_ve_hi32:
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case VE::fixup_ve_pc_hi32:
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case VE::fixup_ve_got_hi32:
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case VE::fixup_ve_gotoff_hi32:
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case VE::fixup_ve_plt_hi32:
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case VE::fixup_ve_tls_gd_hi32:
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case VE::fixup_ve_tpoff_hi32:
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return (Value >> 32) & 0xffffffff;
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case VE::fixup_ve_reflong:
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case VE::fixup_ve_lo32:
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case VE::fixup_ve_pc_lo32:
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case VE::fixup_ve_got_lo32:
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case VE::fixup_ve_gotoff_lo32:
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case VE::fixup_ve_plt_lo32:
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case VE::fixup_ve_tls_gd_lo32:
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case VE::fixup_ve_tpoff_lo32:
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return Value & 0xffffffff;
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}
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}
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/// getFixupKindNumBytes - The number of bytes the fixup may change.
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static unsigned getFixupKindNumBytes(unsigned Kind) {
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switch (Kind) {
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default:
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llvm_unreachable("Unknown fixup kind!");
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case FK_Data_1:
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case FK_PCRel_1:
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return 1;
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case FK_Data_2:
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case FK_PCRel_2:
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return 2;
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return 4;
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case FK_Data_4:
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case FK_PCRel_4:
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case VE::fixup_ve_reflong:
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case VE::fixup_ve_hi32:
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case VE::fixup_ve_lo32:
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case VE::fixup_ve_pc_hi32:
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case VE::fixup_ve_pc_lo32:
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case VE::fixup_ve_got_hi32:
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case VE::fixup_ve_got_lo32:
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case VE::fixup_ve_gotoff_hi32:
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case VE::fixup_ve_gotoff_lo32:
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case VE::fixup_ve_plt_hi32:
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case VE::fixup_ve_plt_lo32:
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case VE::fixup_ve_tls_gd_hi32:
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case VE::fixup_ve_tls_gd_lo32:
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case VE::fixup_ve_tpoff_hi32:
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case VE::fixup_ve_tpoff_lo32:
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return 4;
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case FK_Data_8:
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case FK_PCRel_8:
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return 8;
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}
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}
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namespace {
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class VEAsmBackend : public MCAsmBackend {
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protected:
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const Target &TheTarget;
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public:
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VEAsmBackend(const Target &T) : MCAsmBackend(support::little), TheTarget(T) {}
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unsigned getNumFixupKinds() const override { return VE::NumTargetFixupKinds; }
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const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override {
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const static MCFixupKindInfo Infos[VE::NumTargetFixupKinds] = {
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// name, offset, bits, flags
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{"fixup_ve_reflong", 0, 32, 0},
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{"fixup_ve_hi32", 0, 32, 0},
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{"fixup_ve_lo32", 0, 32, 0},
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{"fixup_ve_pc_hi32", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
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{"fixup_ve_pc_lo32", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
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{"fixup_ve_got_hi32", 0, 32, 0},
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{"fixup_ve_got_lo32", 0, 32, 0},
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{"fixup_ve_gotoff_hi32", 0, 32, 0},
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{"fixup_ve_gotoff_lo32", 0, 32, 0},
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{"fixup_ve_plt_hi32", 0, 32, 0},
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{"fixup_ve_plt_lo32", 0, 32, 0},
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{"fixup_ve_tls_gd_hi32", 0, 32, 0},
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{"fixup_ve_tls_gd_lo32", 0, 32, 0},
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{"fixup_ve_tpoff_hi32", 0, 32, 0},
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{"fixup_ve_tpoff_lo32", 0, 32, 0},
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};
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if (Kind < FirstTargetFixupKind)
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return MCAsmBackend::getFixupKindInfo(Kind);
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assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
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"Invalid kind!");
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return Infos[Kind - FirstTargetFixupKind];
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}
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bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
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const MCValue &Target) override {
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switch ((VE::Fixups)Fixup.getKind()) {
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default:
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return false;
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case VE::fixup_ve_tls_gd_hi32:
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case VE::fixup_ve_tls_gd_lo32:
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case VE::fixup_ve_tpoff_hi32:
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case VE::fixup_ve_tpoff_lo32:
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return true;
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}
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}
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bool mayNeedRelaxation(const MCInst &Inst,
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const MCSubtargetInfo &STI) const override {
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// Not implemented yet. For example, if we have a branch with
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// lager than SIMM32 immediate value, we want to relaxation such
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// branch instructions.
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return false;
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}
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/// fixupNeedsRelaxation - Target specific predicate for whether a given
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/// fixup requires the associated instruction to be relaxed.
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bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
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const MCRelaxableFragment *DF,
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const MCAsmLayout &Layout) const override {
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// Not implemented yet. For example, if we have a branch with
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// lager than SIMM32 immediate value, we want to relaxation such
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// branch instructions.
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return false;
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}
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void relaxInstruction(MCInst &Inst,
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const MCSubtargetInfo &STI) const override {
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// Aurora VE doesn't support relaxInstruction yet.
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llvm_unreachable("relaxInstruction() should not be called");
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}
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bool writeNopData(raw_ostream &OS, uint64_t Count) const override {
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if ((Count % 8) != 0)
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return false;
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for (uint64_t i = 0; i < Count; i += 8)
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support::endian::write<uint64_t>(OS, 0x7900000000000000ULL,
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support::little);
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return true;
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}
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};
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class ELFVEAsmBackend : public VEAsmBackend {
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Triple::OSType OSType;
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public:
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ELFVEAsmBackend(const Target &T, Triple::OSType OSType)
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: VEAsmBackend(T), OSType(OSType) {}
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void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
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const MCValue &Target, MutableArrayRef<char> Data,
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uint64_t Value, bool IsResolved,
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const MCSubtargetInfo *STI) const override {
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Value = adjustFixupValue(Fixup.getKind(), Value);
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if (!Value)
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return; // Doesn't change encoding.
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MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
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// Shift the value into position.
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Value <<= Info.TargetOffset;
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unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind());
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unsigned Offset = Fixup.getOffset();
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assert(Offset + NumBytes <= Data.size() && "Invalid fixup offset!");
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// For each byte of the fragment that the fixup touches, mask in the bits
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// from the fixup value. The Value has been "split up" into the
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// appropriate bitfields above.
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for (unsigned i = 0; i != NumBytes; ++i) {
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unsigned Idx = Endian == support::little ? i : (NumBytes - 1) - i;
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Data[Offset + Idx] |= static_cast<uint8_t>((Value >> (i * 8)) & 0xff);
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}
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}
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std::unique_ptr<MCObjectTargetWriter>
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createObjectTargetWriter() const override {
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uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(OSType);
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return createVEELFObjectWriter(OSABI);
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}
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};
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} // end anonymous namespace
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MCAsmBackend *llvm::createVEAsmBackend(const Target &T,
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const MCSubtargetInfo &STI,
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const MCRegisterInfo &MRI,
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const MCTargetOptions &Options) {
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return new ELFVEAsmBackend(T, STI.getTargetTriple().getOS());
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}
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