160 lines
5.3 KiB
LLVM
160 lines
5.3 KiB
LLVM
; RUN: llc -march=hexagon < %s
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; REQUIRES: asserts
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; After a copy R20 = R29, RDF copy propagation attempted to replace R20 with
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; R29. R29 did not have a reaching def at that point (which isn't unusual),
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; but copy propagation tried to link the new use of R29 to the presumed
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; reaching def (which was null), causing a crash.
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target triple = "hexagon"
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@g0 = external unnamed_addr global i1, align 4
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; Function Attrs: nounwind
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declare i8* @llvm.stacksave() #0
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; Function Attrs: nounwind
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declare void @llvm.stackrestore(i8*) #0
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; Function Attrs: norecurse nounwind
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declare fastcc void @f0(i16 signext, i16 signext, i16 signext, i16* nocapture readonly, i16 signext, i16* nocapture) unnamed_addr #1
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; Function Attrs: norecurse nounwind
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declare fastcc signext i16 @f1(i16 signext, i16 signext) unnamed_addr #1
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; Function Attrs: norecurse nounwind
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define fastcc i32 @f2(i16* nocapture readonly %a0, i16 signext %a1, i16 signext %a2, i16* nocapture readonly %a3, i16 signext %a4, i16* nocapture readonly %a51, i16* nocapture %a6) unnamed_addr #1 {
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b0:
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%v0 = tail call i8* @llvm.stacksave()
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%v1 = tail call fastcc signext i16 @f1(i16 signext %a2, i16 signext %a1)
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br i1 undef, label %b7, label %b1
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b1: ; preds = %b0
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br i1 undef, label %b3, label %b2
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b2: ; preds = %b1
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br i1 undef, label %b4, label %b8
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b3: ; preds = %b1
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br i1 undef, label %b5, label %b8
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b4: ; preds = %b4, %b2
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br i1 undef, label %b4, label %b6, !llvm.loop !2
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b5: ; preds = %b5, %b3
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%v2 = phi i16 [ %v3, %b5 ], [ 0, %b3 ]
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%v3 = add i16 %v2, 1
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%v4 = icmp sgt i32 0, -1073741825
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br i1 %v4, label %b5, label %b6
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b6: ; preds = %b5, %b4
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%v5 = phi i16 [ %v3, %b5 ], [ undef, %b4 ]
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br label %b7
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b7: ; preds = %b6, %b0
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%v6 = phi i16 [ %v5, %b6 ], [ 0, %b0 ]
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br i1 undef, label %b9, label %b8
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b8: ; preds = %b7, %b3, %b2
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%v7 = or i32 0, undef
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br label %b9
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b9: ; preds = %b8, %b7
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%v8 = phi i16 [ 0, %b8 ], [ %v6, %b7 ]
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%v9 = phi i32 [ %v7, %b8 ], [ 0, %b7 ]
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%v10 = load i16, i16* undef, align 2, !tbaa !4
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%v11 = sext i16 %v10 to i32
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%v12 = zext i16 %v10 to i32
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br i1 undef, label %b10, label %b11
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b10: ; preds = %b9
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store i1 true, i1* @g0, align 4
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br label %b11
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b11: ; preds = %b10, %b9
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%v13 = load i16, i16* undef, align 2, !tbaa !4
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%v14 = sext i16 %v13 to i32
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%v15 = shl nuw i32 %v12, 16
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%v16 = and i32 %v9, 65535
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%v17 = mul nsw i32 %v11, %v16
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%v18 = sitofp i32 %v15 to double
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%v19 = fsub double %v18, undef
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%v20 = sub nsw i32 %v15, %v17
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%v21 = fptosi double %v19 to i32
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%v22 = select i1 undef, i32 %v21, i32 %v20
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%v23 = mul nsw i32 %v14, %v16
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%v24 = add nsw i32 %v23, %v22
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%v25 = add nsw i32 %v24, 32768
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%v26 = lshr i32 %v25, 16
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%v27 = xor i1 undef, true
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%v28 = and i1 %v27, undef
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br i1 %v28, label %b12, label %b13
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b12: ; preds = %b11
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store i1 true, i1* @g0, align 4
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br label %b13
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b13: ; preds = %b12, %b11
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br i1 undef, label %b14, label %b24
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b14: ; preds = %b13
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br label %b15
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b15: ; preds = %b23, %b14
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br i1 undef, label %b16, label %b17
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b16: ; preds = %b15
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br label %b19
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b17: ; preds = %b15
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%v29 = trunc i32 %v26 to i16
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%v30 = icmp eq i16 %v29, -32768
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%v31 = and i1 undef, %v30
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br i1 %v31, label %b18, label %b19
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b18: ; preds = %b17
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store i1 true, i1* @g0, align 4
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br label %b20
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b19: ; preds = %b17, %b16
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br label %b20
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b20: ; preds = %b19, %b18
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%v32 = phi i32 [ 2147483647, %b18 ], [ 0, %b19 ]
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%v33 = icmp eq i16 %v8, 32767
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br i1 %v33, label %b21, label %b22
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b21: ; preds = %b20
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store i1 true, i1* @g0, align 4
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br label %b23
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b22: ; preds = %b20
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br label %b23
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b23: ; preds = %b22, %b21
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%v34 = add nsw i32 %v32, 32768
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%v35 = lshr i32 %v34, 16
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%v36 = trunc i32 %v35 to i16
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store i16 %v36, i16* undef, align 2, !tbaa !4
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br i1 undef, label %b24, label %b15
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b24: ; preds = %b23, %b13
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call fastcc void @f0(i16 signext undef, i16 signext %a1, i16 signext %a2, i16* %a3, i16 signext %a4, i16* %a6)
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call void @llvm.stackrestore(i8* %v0)
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ret i32 undef
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}
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attributes #0 = { nounwind }
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attributes #1 = { norecurse nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" }
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!llvm.module.flags = !{!0}
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!0 = !{i32 6, !"Target Features", !1}
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!1 = !{!"+hvx,+hvx-length64b"}
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!2 = distinct !{!2, !3}
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!3 = !{!"llvm.loop.threadify", i32 43789156}
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!4 = !{!5, !5, i64 0}
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!5 = !{!"short", !6, i64 0}
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!6 = !{!"omnipotent char", !7, i64 0}
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!7 = !{!"Simple C++ TBAA"}
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