Craig Topper dfc1901d51 [RISCV] Custom lower ISD::VSCALE. ... This patch custom lowers ISD::VSCALE into a csrr vlenb followed by a shift right by 3 followed by a multiply by the scale amount. I've added computeKnownBits support to indicate that the csrr vlenb always produces 3 trailng bits of 0s so the shift right is "exact". This allows the shift and multiply sequence to be nicely optimized into a single shift or removed completely when the scale amount is a power of 2. The non power of 2 case multiplying by 24 is still producing suboptimal code. We could remove the right shift and use a multiply by 3. Hopefully we can improve DAG combine to fix that since it's not unique to this sequence. This replaces D94144. Reviewed By: HsiangKai Differential Revision: https://reviews.llvm.org/D94249		2021-01-13 17:14:49 -08:00
..
add-vsetvli-gpr.mir	[RISCV] Refine vector load/store tablegen pattern, NFC.	2020-12-15 18:55:55 -08:00
add-vsetvli-vlmax.ll	[RISCV] Refine vector load/store tablegen pattern, NFC.	2020-12-15 18:55:55 -08:00
cleanup-vsetvli.mir	[RISCV] Add a pass to remove duplicate VSETVLI instructions in a basic block.	2020-12-11 10:35:37 -08:00
load-add-store-8.ll	[RISCV] Add a pass to remove duplicate VSETVLI instructions in a basic block.	2020-12-11 10:35:37 -08:00
load-add-store-16.ll	[RISCV] Add a pass to remove duplicate VSETVLI instructions in a basic block.	2020-12-11 10:35:37 -08:00
load-add-store-32.ll	[RISCV] Add a pass to remove duplicate VSETVLI instructions in a basic block.	2020-12-11 10:35:37 -08:00
load-add-store-64.ll	[RISCV] Add a pass to remove duplicate VSETVLI instructions in a basic block.	2020-12-11 10:35:37 -08:00
rv32-vsetvli-intrinsics.ll	[RISCV] Add intrinsics for vsetvli instruction	2020-12-18 12:10:09 -08:00
rv64-vsetvli-intrinsics.ll	[RISCV] Add intrinsics for vsetvli instruction	2020-12-18 12:10:09 -08:00
rvv-vscale.i32.ll	[RISCV] Custom lower ISD::VSCALE.	2021-01-13 17:14:49 -08:00
rvv-vscale.i64.ll	[RISCV] Custom lower ISD::VSCALE.	2021-01-13 17:14:49 -08:00
setcc-fp-rv32.ll	[LegalizeDAG][RISCV][PowerPC][AMDGPU][WebAssembly] Improve expansion of SETONE/SETUEQ on targets without SETO/SETUO.	2021-01-12 10:45:03 -08:00
setcc-fp-rv64.ll	[LegalizeDAG][RISCV][PowerPC][AMDGPU][WebAssembly] Improve expansion of SETONE/SETUEQ on targets without SETO/SETUO.	2021-01-12 10:45:03 -08:00
setcc-integer-rv32.ll	[RISCV] Add scalable vector icmp ISel patterns	2021-01-09 20:54:34 +00:00
setcc-integer-rv64.ll	[RISCV] Add scalable vector icmp ISel patterns	2021-01-09 20:54:34 +00:00
vaadd-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vaadd-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vaaddu-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vaaddu-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vadc-rv32.ll	[RISCV] Sign extend constant arguments to V intrinsics when promoting to XLen.	2020-12-18 11:43:38 -08:00
vadc-rv64.ll	[RISCV] Sign extend constant arguments to V intrinsics when promoting to XLen.	2020-12-18 11:43:38 -08:00
vadd-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vadd-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vadd-sdnode-rv32.ll	[RISCV] Add tests for scalable constant-folding (NFC)	2021-01-09 11:31:22 +00:00
vadd-sdnode-rv64.ll	[RISCV] Add ISel support for RVV vector/scalar forms	2020-12-23 20:16:18 +00:00
vand-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vand-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vand-sdnode-rv32.ll	[RISCV] Fill out basic integer RVV ISel patterns	2020-12-29 19:32:18 +00:00
vand-sdnode-rv64.ll	[RISCV] Fill out basic integer RVV ISel patterns	2020-12-29 19:32:18 +00:00
vasub-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vasub-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vasubu-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vasubu-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vcompress-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vcompress-rv64.ll	[RISCV] Remove '.mask' from vcompress intrinsic name. NFC	2021-01-12 14:46:16 -08:00
vdiv-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vdiv-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vdiv-sdnode-rv32.ll	[SelectionDAG] Teach isConstOrConstSplat about ISD::SPLAT_VECTOR	2021-01-09 20:54:34 +00:00
vdiv-sdnode-rv64.ll	[RISCV] Add vector integer mul/mulh/div/rem ISel patterns	2021-01-06 09:24:07 +00:00
vdivu-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vdivu-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vdivu-sdnode-rv32.ll	[SelectionDAG] Teach isConstOrConstSplat about ISD::SPLAT_VECTOR	2021-01-09 20:54:34 +00:00
vdivu-sdnode-rv64.ll	[RISCV] Add vector integer mul/mulh/div/rem ISel patterns	2021-01-06 09:24:07 +00:00
vfadd-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfadd-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfadd-sdnode-rv32.ll	[RISCV] Add scalable vector fadd/fsub/fmul/fdiv ISel patterns	2021-01-11 21:19:48 +00:00
vfadd-sdnode-rv64.ll	[RISCV] Add scalable vector fadd/fsub/fmul/fdiv ISel patterns	2021-01-11 21:19:48 +00:00
vfclass-rv32.ll	[RISCV] Define the vfclass RVV intrinsics	2021-01-11 17:40:09 -06:00
vfclass-rv64.ll	[RISCV] Define the vfclass RVV intrinsics	2021-01-11 17:40:09 -06:00
vfcvt-f-x-rv32.ll	[RISCV] Define vector single-width type-convert intrinsic.	2020-12-31 11:49:30 +08:00
vfcvt-f-x-rv64.ll	[RISCV] Define vector single-width type-convert intrinsic.	2020-12-31 11:49:30 +08:00
vfcvt-f-xu-rv32.ll	[RISCV] Define vector single-width type-convert intrinsic.	2020-12-31 11:49:30 +08:00
vfcvt-f-xu-rv64.ll	[RISCV] Define vector single-width type-convert intrinsic.	2020-12-31 11:49:30 +08:00
vfcvt-rtz-x-f-rv32.ll	[RISCV] Define vector single-width type-convert intrinsic.	2020-12-31 11:49:30 +08:00
vfcvt-rtz-x-f-rv64.ll	[RISCV] Define vector single-width type-convert intrinsic.	2020-12-31 11:49:30 +08:00
vfcvt-rtz-xu-f-rv32.ll	[RISCV] Define vector single-width type-convert intrinsic.	2020-12-31 11:49:30 +08:00
vfcvt-rtz-xu-f-rv64.ll	[RISCV] Define vector single-width type-convert intrinsic.	2020-12-31 11:49:30 +08:00
vfcvt-x-f-rv32.ll	[RISCV] Define vector single-width type-convert intrinsic.	2020-12-31 11:49:30 +08:00
vfcvt-x-f-rv64.ll	[RISCV] Define vector single-width type-convert intrinsic.	2020-12-31 11:49:30 +08:00
vfcvt-xu-f-rv32.ll	[RISCV] Define vector single-width type-convert intrinsic.	2020-12-31 11:49:30 +08:00
vfcvt-xu-f-rv64.ll	[RISCV] Define vector single-width type-convert intrinsic.	2020-12-31 11:49:30 +08:00
vfdiv-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfdiv-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfdiv-sdnode-rv32.ll	[RISCV] Add scalable vector fadd/fsub/fmul/fdiv ISel patterns	2021-01-11 21:19:48 +00:00
vfdiv-sdnode-rv64.ll	[RISCV] Add scalable vector fadd/fsub/fmul/fdiv ISel patterns	2021-01-11 21:19:48 +00:00
vfirst-rv32.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vfirst-rv64.ll	[RISCV] Define vpopc/vfirst intrinsics.	2020-12-24 19:44:34 -08:00
vfmacc-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfmacc-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfmadd-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfmadd-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfmax-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfmax-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfmerge-rv32.ll	[RISCV] Add double test cases to vfmerge-rv32.ll. NFC	2021-01-12 13:09:48 -08:00
vfmerge-rv64.ll	[RISCV] Use vmerge.vim for llvm.riscv.vfmerge with a 0.0 scalar operand.	2021-01-12 11:08:26 -08:00
vfmin-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfmin-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfmsac-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfmsac-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfmsub-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfmsub-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfmul-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfmul-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfmul-sdnode-rv32.ll	[RISCV] Add scalable vector fadd/fsub/fmul/fdiv ISel patterns	2021-01-11 21:19:48 +00:00
vfmul-sdnode-rv64.ll	[RISCV] Add scalable vector fadd/fsub/fmul/fdiv ISel patterns	2021-01-11 21:19:48 +00:00
vfmv.f.s.ll	Recommit "[RISCV] Add intrinsics for vfmv.f.s and vfmv.s.f"	2020-12-18 11:19:05 -08:00
vfmv.s.f-rv32.ll	Recommit "[RISCV] Add intrinsics for vfmv.f.s and vfmv.s.f"	2020-12-18 11:19:05 -08:00
vfmv.s.f-rv64.ll	Recommit "[RISCV] Add intrinsics for vfmv.f.s and vfmv.s.f"	2020-12-18 11:19:05 -08:00
vfmv.v.f-rv32.ll	[RISCV] Use vmv.v.i vd, 0 instead of vmv.v.x vd, x0 for llvm.riscv.vfmv.v.f with 0.0	2021-01-11 15:08:05 -08:00
vfmv.v.f-rv64.ll	[RISCV] Use vmv.v.i vd, 0 instead of vmv.v.x vd, x0 for llvm.riscv.vfmv.v.f with 0.0	2021-01-11 15:08:05 -08:00
vfncvt-f-f-rv32.ll	[RISCV] Define vector narrowing type-convert intrinsic.	2020-12-31 11:48:28 +08:00
vfncvt-f-f-rv64.ll	[RISCV] Define vector narrowing type-convert intrinsic.	2020-12-31 11:48:28 +08:00
vfncvt-f-x-rv32.ll	[RISCV] Define vector narrowing type-convert intrinsic.	2020-12-31 11:48:28 +08:00
vfncvt-f-x-rv64.ll	[RISCV] Define vector narrowing type-convert intrinsic.	2020-12-31 11:48:28 +08:00
vfncvt-f-xu-rv32.ll	[RISCV] Define vector narrowing type-convert intrinsic.	2020-12-31 11:48:28 +08:00
vfncvt-f-xu-rv64.ll	[RISCV] Define vector narrowing type-convert intrinsic.	2020-12-31 11:48:28 +08:00
vfncvt-rod-f-f-rv32.ll	[RISCV] Define vector narrowing type-convert intrinsic.	2020-12-31 11:48:28 +08:00
vfncvt-rod-f-f-rv64.ll	[RISCV] Define vector narrowing type-convert intrinsic.	2020-12-31 11:48:28 +08:00
vfncvt-rtz-x-f-rv32.ll	[RISCV] Define vector narrowing type-convert intrinsic.	2020-12-31 11:48:28 +08:00
vfncvt-rtz-x-f-rv64.ll	[RISCV] Define vector narrowing type-convert intrinsic.	2020-12-31 11:48:28 +08:00
vfncvt-rtz-xu-f-rv32.ll	[RISCV] Define vector narrowing type-convert intrinsic.	2020-12-31 11:48:28 +08:00
vfncvt-rtz-xu-f-rv64.ll	[RISCV] Define vector narrowing type-convert intrinsic.	2020-12-31 11:48:28 +08:00
vfncvt-x-f-rv32.ll	[RISCV] Define vector narrowing type-convert intrinsic.	2020-12-31 11:48:28 +08:00
vfncvt-x-f-rv64.ll	[RISCV] Define vector narrowing type-convert intrinsic.	2020-12-31 11:48:28 +08:00
vfncvt-xu-f-rv32.ll	[RISCV] Define vector narrowing type-convert intrinsic.	2020-12-31 11:48:28 +08:00
vfncvt-xu-f-rv64.ll	[RISCV] Define vector narrowing type-convert intrinsic.	2020-12-31 11:48:28 +08:00
vfnmacc-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfnmacc-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfnmadd-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfnmadd-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfnmsac-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfnmsac-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfnmsub-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfnmsub-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfrdiv-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfrdiv-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfredmax-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfredmax-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vfredmin-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfredmin-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vfredosum-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfredosum-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vfredsum-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfredsum-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vfrsub-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfrsub-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfsgnj-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfsgnj-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfsgnjn-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfsgnjn-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfsgnjx-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfsgnjx-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfslide1down-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfslide1down-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfslide1up-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfslide1up-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfsqrt-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfsqrt-rv64.ll	[RISCV] Define the vfsqrt RVV intrinsics	2021-01-07 17:29:29 -06:00
vfsub-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfsub-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfsub-sdnode-rv32.ll	[RISCV] Add scalable vector fadd/fsub/fmul/fdiv ISel patterns	2021-01-11 21:19:48 +00:00
vfsub-sdnode-rv64.ll	[RISCV] Add scalable vector fadd/fsub/fmul/fdiv ISel patterns	2021-01-11 21:19:48 +00:00
vfwadd-rv32.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vfwadd-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vfwadd.w-rv32.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vfwadd.w-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vfwcvt-f-f-rv32.ll	[RISCV] Define vector widening type-convert intrinsic.	2020-12-31 11:48:09 +08:00
vfwcvt-f-f-rv64.ll	[RISCV] Define vector widening type-convert intrinsic.	2020-12-31 11:48:09 +08:00
vfwcvt-f-x-rv32.ll	[RISCV] Define vector widening type-convert intrinsic.	2020-12-31 11:48:09 +08:00
vfwcvt-f-x-rv64.ll	[RISCV] Define vector widening type-convert intrinsic.	2020-12-31 11:48:09 +08:00
vfwcvt-f-xu-rv32.ll	[RISCV] Define vector widening type-convert intrinsic.	2020-12-31 11:48:09 +08:00
vfwcvt-f-xu-rv64.ll	[RISCV] Define vector widening type-convert intrinsic.	2020-12-31 11:48:09 +08:00
vfwcvt-rtz-x-f-rv32.ll	[RISCV] Define vector widening type-convert intrinsic.	2020-12-31 11:48:09 +08:00
vfwcvt-rtz-x-f-rv64.ll	[RISCV] Define vector widening type-convert intrinsic.	2020-12-31 11:48:09 +08:00
vfwcvt-rtz-xu-f-rv32.ll	[RISCV] Define vector widening type-convert intrinsic.	2020-12-31 11:48:09 +08:00
vfwcvt-rtz-xu-f-rv64.ll	[RISCV] Define vector widening type-convert intrinsic.	2020-12-31 11:48:09 +08:00
vfwcvt-x-f-rv32.ll	[RISCV] Define vector widening type-convert intrinsic.	2020-12-31 11:48:09 +08:00
vfwcvt-x-f-rv64.ll	[RISCV] Define vector widening type-convert intrinsic.	2020-12-31 11:48:09 +08:00
vfwcvt-xu-f-rv32.ll	[RISCV] Define vector widening type-convert intrinsic.	2020-12-31 11:48:09 +08:00
vfwcvt-xu-f-rv64.ll	[RISCV] Define vector widening type-convert intrinsic.	2020-12-31 11:48:09 +08:00
vfwmacc-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfwmacc-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfwmsac-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfwmsac-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfwmul-rv32.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vfwmul-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vfwnmacc-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfwnmacc-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfwnmsac-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vfwnmsac-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vfwredosum-rv32.ll	Add intrinsic testcase for some missing widening reduction.	2020-12-31 11:15:15 +08:00
vfwredosum-rv64.ll	Add intrinsic testcase for some missing widening reduction.	2020-12-31 11:15:15 +08:00
vfwredsum-rv32.ll	Add intrinsic testcase for some missing widening reduction.	2020-12-31 11:15:15 +08:00
vfwredsum-rv64.ll	Add intrinsic testcase for some missing widening reduction.	2020-12-31 11:15:15 +08:00
vfwsub-rv32.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vfwsub-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vfwsub.w-rv32.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vfwsub.w-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vid-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vid-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
viota-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
viota-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vle-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vle-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vleff-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vleff-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vlse-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vlse-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vlxe-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vlxe-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmacc-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmacc-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmadc-rv32.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vmadc-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vmadc.carry.in-rv32.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vmadc.carry.in-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vmadd-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmadd-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmand-rv32.ll	[RISCV] Define vector mask-register logical intrinsics.	2020-12-24 18:59:05 -08:00
vmand-rv64.ll	[RISCV] Define vector mask-register logical intrinsics.	2020-12-24 18:59:05 -08:00
vmandnot-rv32.ll	[RISCV] Define vector mask-register logical intrinsics.	2020-12-24 18:59:05 -08:00
vmandnot-rv64.ll	[RISCV] Define vector mask-register logical intrinsics.	2020-12-24 18:59:05 -08:00
vmarith-sdnode.ll	[RISCV] Add vector mask arithmetic ISel patterns	2021-01-07 09:43:25 +00:00
vmax-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmax-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmax-sdnode-rv32.ll	[RISCV] Add vector integer min/max ISel patterns	2021-01-05 09:15:50 +00:00
vmax-sdnode-rv64.ll	[RISCV] Add vector integer min/max ISel patterns	2021-01-05 09:15:50 +00:00
vmaxu-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmaxu-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmaxu-sdnode-rv32.ll	[RISCV] Add vector integer min/max ISel patterns	2021-01-05 09:15:50 +00:00
vmaxu-sdnode-rv64.ll	[RISCV] Add vector integer min/max ISel patterns	2021-01-05 09:15:50 +00:00
vmclr-rv32.ll	[RISCV] Define vmclr.m/vmset.m intrinsics.	2020-12-28 18:57:17 -08:00
vmclr-rv64.ll	[RISCV] Define vmclr.m/vmset.m intrinsics.	2020-12-28 18:57:17 -08:00
vmerge-rv32.ll	[RISCV] Define vmerge/vfmerge intrinsics.	2020-12-23 00:07:09 -08:00
vmerge-rv64.ll	[RISCV] Define vmerge/vfmerge intrinsics.	2020-12-23 00:07:09 -08:00
vmfeq-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmfeq-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmfge-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmfge-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmfgt-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmfgt-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmfle-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmfle-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmflt-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmflt-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmfne-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmfne-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmin-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmin-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmin-sdnode-rv32.ll	[RISCV] Add vector integer min/max ISel patterns	2021-01-05 09:15:50 +00:00
vmin-sdnode-rv64.ll	[RISCV] Add vector integer min/max ISel patterns	2021-01-05 09:15:50 +00:00
vminu-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vminu-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vminu-sdnode-rv32.ll	[RISCV] Add vector integer min/max ISel patterns	2021-01-05 09:15:50 +00:00
vminu-sdnode-rv64.ll	[RISCV] Add vector integer min/max ISel patterns	2021-01-05 09:15:50 +00:00
vmnand-rv32.ll	[RISCV] Define vector mask-register logical intrinsics.	2020-12-24 18:59:05 -08:00
vmnand-rv64.ll	[RISCV] Define vector mask-register logical intrinsics.	2020-12-24 18:59:05 -08:00
vmnor-rv32.ll	[RISCV] Define vector mask-register logical intrinsics.	2020-12-24 18:59:05 -08:00
vmnor-rv64.ll	[RISCV] Define vector mask-register logical intrinsics.	2020-12-24 18:59:05 -08:00
vmor-rv32.ll	[RISCV] Define vector mask-register logical intrinsics.	2020-12-24 18:59:05 -08:00
vmor-rv64.ll	[RISCV] Define vector mask-register logical intrinsics.	2020-12-24 18:59:05 -08:00
vmornot-rv32.ll	[RISCV] Define vector mask-register logical intrinsics.	2020-12-24 18:59:05 -08:00
vmornot-rv64.ll	[RISCV] Define vector mask-register logical intrinsics.	2020-12-24 18:59:05 -08:00
vmsbc-rv32.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vmsbc-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vmsbc.borrow.in-rv32.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vmsbc.borrow.in-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vmsbf-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmsbf-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmseq-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmseq-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmset-rv32.ll	[RISCV] Define vmclr.m/vmset.m intrinsics.	2020-12-28 18:57:17 -08:00
vmset-rv64.ll	[RISCV] Define vmclr.m/vmset.m intrinsics.	2020-12-28 18:57:17 -08:00
vmsgt-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmsgt-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmsgtu-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmsgtu-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmsif-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmsif-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmsle-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmsle-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmsleu-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmsleu-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmslt-rv32.ll	[RISCV] Match vmslt(u).vx intrinsics with a small immediate to vmsle(u).vx.	2021-01-05 10:20:21 -08:00
vmslt-rv64.ll	[RISCV] Match vmslt(u).vx intrinsics with a small immediate to vmsle(u).vx.	2021-01-05 10:20:21 -08:00
vmsltu-rv32.ll	[RISCV] Match vmslt(u).vx intrinsics with a small immediate to vmsle(u).vx.	2021-01-05 10:20:21 -08:00
vmsltu-rv64.ll	[RISCV] Match vmslt(u).vx intrinsics with a small immediate to vmsle(u).vx.	2021-01-05 10:20:21 -08:00
vmsne-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmsne-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmsof-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmsof-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmul-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmul-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmul-sdnode-rv32.ll	[RISCV] Add vector integer mul/mulh/div/rem ISel patterns	2021-01-06 09:24:07 +00:00
vmul-sdnode-rv64.ll	[RISCV] Add vector integer mul/mulh/div/rem ISel patterns	2021-01-06 09:24:07 +00:00
vmulh-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmulh-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmulhsu-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmulhsu-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmulhu-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmulhu-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vmv.s.x-rv32.ll	[RISCV] Add intrinsics for vmv.x.s and vmv.s.x	2020-12-18 10:30:48 -08:00
vmv.s.x-rv64.ll	[RISCV] Add intrinsics for vmv.x.s and vmv.s.x	2020-12-18 10:30:48 -08:00
vmv.v.v-rv32.ll	[RISCV] Update vmv.v.v-rv32.ll and vmv.v.v-rv64.ll to test the correct intrinsics.	2020-12-21 16:27:09 -08:00
vmv.v.v-rv64.ll	[RISCV] Update vmv.v.v-rv32.ll and vmv.v.v-rv64.ll to test the correct intrinsics.	2020-12-21 16:27:09 -08:00
vmv.v.x-rv32.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vmv.v.x-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vmv.x.s-rv32.ll	[RISCV] Add intrinsics for vmv.x.s and vmv.s.x	2020-12-18 10:30:48 -08:00
vmv.x.s-rv64.ll	[RISCV] Add intrinsics for vmv.x.s and vmv.s.x	2020-12-18 10:30:48 -08:00
vmxnor-rv32.ll	[RISCV] Define vector mask-register logical intrinsics.	2020-12-24 18:59:05 -08:00
vmxnor-rv64.ll	[RISCV] Define vector mask-register logical intrinsics.	2020-12-24 18:59:05 -08:00
vmxor-rv32.ll	[RISCV] Define vector mask-register logical intrinsics.	2020-12-24 18:59:05 -08:00
vmxor-rv64.ll	[RISCV] Define vector mask-register logical intrinsics.	2020-12-24 18:59:05 -08:00
vnclip-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vnclip-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vnclipu-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vnclipu-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vnmsac-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vnmsac-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vnmsub-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vnmsub-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vnsra-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vnsra-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vnsrl-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vnsrl-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vor-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vor-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vor-sdnode-rv32.ll	[RISCV] Adjust tested vor ops for more stable tests. NFC.	2020-12-28 19:33:25 +00:00
vor-sdnode-rv64.ll	[RISCV] Adjust tested vor ops for more stable tests. NFC.	2020-12-28 19:33:25 +00:00
vpopc-rv32.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vpopc-rv64.ll	[RISCV] Define vpopc/vfirst intrinsics.	2020-12-24 19:44:34 -08:00
vredand-rv32.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vredand-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vredmax-rv32.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vredmax-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vredmaxu-rv32.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vredmaxu-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vredmin-rv32.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vredmin-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vredminu-rv32.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vredminu-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vredor-rv32.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vredor-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vredsum-rv32.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vredsum-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vredxor-rv32.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vredxor-rv64.ll	[RISCV] Cleanup some V intrinsic names used in tests to match the type overloads used. Add some missing double tests on rv32. NFC	2020-12-30 12:37:11 -08:00
vrem-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vrem-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vrem-sdnode-rv32.ll	[RISCV] Add vector integer mul/mulh/div/rem ISel patterns	2021-01-06 09:24:07 +00:00
vrem-sdnode-rv64.ll	[RISCV] Add vector integer mul/mulh/div/rem ISel patterns	2021-01-06 09:24:07 +00:00
vremu-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vremu-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vremu-sdnode-rv32.ll	[RISCV] Add vector integer mul/mulh/div/rem ISel patterns	2021-01-06 09:24:07 +00:00
vremu-sdnode-rv64.ll	[RISCV] Add vector integer mul/mulh/div/rem ISel patterns	2021-01-06 09:24:07 +00:00
vrgather-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vrgather-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vrsub-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vrsub-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vrsub-sdnode-rv32.ll	[RISCV] Fill out basic integer RVV ISel patterns	2020-12-29 19:32:18 +00:00
vrsub-sdnode-rv64.ll	[RISCV] Fill out basic integer RVV ISel patterns	2020-12-29 19:32:18 +00:00
vsadd-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vsadd-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vsaddu-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vsaddu-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vsbc-rv32.ll	[RISCV] Define vadc/vmadc/vsbc/vmsbc intrinsics.	2020-12-16 06:31:47 +08:00
vsbc-rv64.ll	[RISCV] Define vadc/vmadc/vsbc/vmsbc intrinsics.	2020-12-16 06:31:47 +08:00
vse-rv32.ll	[RISCV] V does not imply F.	2020-12-17 10:57:36 +08:00
vse-rv64.ll	[RISCV] V does not imply F.	2020-12-17 10:57:36 +08:00
vselect-fp-rv32.ll	[RISCV] Add scalable vector vselect ISel patterns	2021-01-11 22:41:34 +00:00
vselect-fp-rv64.ll	[RISCV] Add scalable vector vselect ISel patterns	2021-01-11 22:41:34 +00:00
vselect-int-rv32.ll	[RISCV] Add scalable vector vselect ISel patterns	2021-01-11 22:41:34 +00:00
vselect-int-rv64.ll	[RISCV] Add scalable vector vselect ISel patterns	2021-01-11 22:41:34 +00:00
vsext-rv32.ll	[RISCV] Define vsext/vzext intrinsics.	2020-12-29 16:50:53 -08:00
vsext-rv64.ll	[RISCV] Define vsext/vzext intrinsics.	2020-12-29 16:50:53 -08:00
vshl-sdnode-rv32.ll	[RISCV] Improve scalable-vector shift tests (NFC)	2021-01-12 11:40:21 +00:00
vshl-sdnode-rv64.ll	[RISCV] Improve scalable-vector shift tests (NFC)	2021-01-12 11:40:21 +00:00
vslide1down-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vslide1down-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vslide1up-rv32.ll	[RISCV] Add intrinsics for vslide1up/down, vfslide1up/down instruction	2020-12-22 18:14:22 -08:00
vslide1up-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vslidedown-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vslidedown-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vslideup-rv32.ll	[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.	2021-01-13 23:45:13 +08:00
vslideup-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vsll-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vsll-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vsmul-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vsmul-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vsplats-fp.ll	[RISCV] Add scalable vector fcmp ISel patterns	2021-01-11 19:38:56 +00:00
vsplats-i1.ll	[RISCV] Add vector mask arithmetic ISel patterns	2021-01-07 09:43:25 +00:00
vsplats-i64.ll	[RISCV] Add ISel support for RVV vector/scalar forms	2020-12-23 20:16:18 +00:00
vsra-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vsra-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vsra-sdnode-rv32.ll	[RISCV] Improve scalable-vector shift tests (NFC)	2021-01-12 11:40:21 +00:00
vsra-sdnode-rv64.ll	[RISCV] Improve scalable-vector shift tests (NFC)	2021-01-12 11:40:21 +00:00
vsrl-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vsrl-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vsrl-sdnode-rv32.ll	[RISCV] Improve scalable-vector shift tests (NFC)	2021-01-12 11:40:21 +00:00
vsrl-sdnode-rv64.ll	[RISCV] Improve scalable-vector shift tests (NFC)	2021-01-12 11:40:21 +00:00
vsse-rv32.ll	[RISCV] Define vlse/vsse intrinsics.	2020-12-17 17:00:01 -08:00
vsse-rv64.ll	[RISCV] Define vlse/vsse intrinsics.	2020-12-17 17:00:01 -08:00
vssra-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vssra-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vssrl-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vssrl-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vssub-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vssub-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vssubu-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vssubu-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vsub-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vsub-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vsub-sdnode-rv32.ll	[RISCV] Fill out basic integer RVV ISel patterns	2020-12-29 19:32:18 +00:00
vsub-sdnode-rv64.ll	[RISCV] Fill out basic integer RVV ISel patterns	2020-12-29 19:32:18 +00:00
vsuxe-rv32.ll	[RISCV] Define vlxe/vsxe/vsuxe intrinsics.	2020-12-19 06:50:20 -08:00
vsuxe-rv64.ll	[RISCV] Define vlxe/vsxe/vsuxe intrinsics.	2020-12-19 06:50:20 -08:00
vsxe-rv32.ll	[RISCV] Define vlxe/vsxe/vsuxe intrinsics.	2020-12-19 06:50:20 -08:00
vsxe-rv64.ll	[RISCV] Define vlxe/vsxe/vsuxe intrinsics.	2020-12-19 06:50:20 -08:00
vwadd-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwadd-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwadd.w-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwadd.w-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwaddu-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwaddu-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwaddu.w-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwaddu.w-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwmacc-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwmacc-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwmaccsu-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwmaccsu-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwmaccu-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwmaccu-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwmaccus-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwmaccus-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwmul-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwmul-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwmulsu-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwmulsu-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwmulu-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwmulu-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwredsum-rv32.ll	Add intrinsic testcase for some missing widening reduction.	2020-12-31 11:15:15 +08:00
vwredsum-rv64.ll	Add intrinsic testcase for some missing widening reduction.	2020-12-31 11:15:15 +08:00
vwredsumu-rv32.ll	Add intrinsic testcase for some missing widening reduction.	2020-12-31 11:15:15 +08:00
vwredsumu-rv64.ll	Add intrinsic testcase for some missing widening reduction.	2020-12-31 11:15:15 +08:00
vwsub-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwsub-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwsub.w-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwsub.w-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwsubu-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwsubu-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwsubu.w-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vwsubu.w-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vxor-rv32.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vxor-rv64.ll	[RISCV] Don't use tail agnostic policy on instructions where destination is tied to source	2020-12-29 10:37:58 -08:00
vxor-sdnode-rv32.ll	[RISCV] Fill out basic integer RVV ISel patterns	2020-12-29 19:32:18 +00:00
vxor-sdnode-rv64.ll	[RISCV] Fill out basic integer RVV ISel patterns	2020-12-29 19:32:18 +00:00
vzext-rv32.ll	[RISCV] Define vsext/vzext intrinsics.	2020-12-29 16:50:53 -08:00
vzext-rv64.ll	[RISCV] Define vsext/vzext intrinsics.	2020-12-29 16:50:53 -08:00