128 lines
4.0 KiB
LLVM
128 lines
4.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mcpu=corei7 -mtriple=i686-- -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=SSE42
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; RUN: llc < %s -mtriple=i686-- -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=NOSSE
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; 64-bit load/store on x86-32
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; FIXME: The generated code can be substantially improved.
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define void @test1(i64* %ptr, i64 %val1) {
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; SSE42-LABEL: test1:
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; SSE42: # %bb.0:
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; SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SSE42-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; SSE42-NEXT: movlps %xmm0, (%eax)
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; SSE42-NEXT: lock orl $0, (%esp)
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; SSE42-NEXT: retl
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;
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; NOSSE-LABEL: test1:
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; NOSSE: # %bb.0:
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; NOSSE-NEXT: pushl %ebp
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; NOSSE-NEXT: .cfi_def_cfa_offset 8
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; NOSSE-NEXT: .cfi_offset %ebp, -8
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; NOSSE-NEXT: movl %esp, %ebp
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; NOSSE-NEXT: .cfi_def_cfa_register %ebp
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; NOSSE-NEXT: andl $-8, %esp
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; NOSSE-NEXT: subl $8, %esp
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; NOSSE-NEXT: movl 8(%ebp), %eax
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; NOSSE-NEXT: movl 12(%ebp), %ecx
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; NOSSE-NEXT: movl 16(%ebp), %edx
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; NOSSE-NEXT: movl %edx, {{[0-9]+}}(%esp)
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; NOSSE-NEXT: movl %ecx, (%esp)
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; NOSSE-NEXT: fildll (%esp)
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; NOSSE-NEXT: fistpll (%eax)
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; NOSSE-NEXT: lock orl $0, (%esp)
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; NOSSE-NEXT: movl %ebp, %esp
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; NOSSE-NEXT: popl %ebp
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; NOSSE-NEXT: .cfi_def_cfa %esp, 4
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; NOSSE-NEXT: retl
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store atomic i64 %val1, i64* %ptr seq_cst, align 8
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ret void
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}
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define i64 @test2(i64* %ptr) {
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; SSE42-LABEL: test2:
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; SSE42: # %bb.0:
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; SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SSE42-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
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; SSE42-NEXT: movd %xmm0, %eax
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; SSE42-NEXT: pextrd $1, %xmm0, %edx
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; SSE42-NEXT: retl
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;
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; NOSSE-LABEL: test2:
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; NOSSE: # %bb.0:
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; NOSSE-NEXT: pushl %ebp
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; NOSSE-NEXT: .cfi_def_cfa_offset 8
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; NOSSE-NEXT: .cfi_offset %ebp, -8
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; NOSSE-NEXT: movl %esp, %ebp
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; NOSSE-NEXT: .cfi_def_cfa_register %ebp
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; NOSSE-NEXT: andl $-8, %esp
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; NOSSE-NEXT: subl $8, %esp
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; NOSSE-NEXT: movl 8(%ebp), %eax
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; NOSSE-NEXT: fildll (%eax)
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; NOSSE-NEXT: fistpll (%esp)
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; NOSSE-NEXT: movl (%esp), %eax
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; NOSSE-NEXT: movl {{[0-9]+}}(%esp), %edx
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; NOSSE-NEXT: movl %ebp, %esp
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; NOSSE-NEXT: popl %ebp
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; NOSSE-NEXT: .cfi_def_cfa %esp, 4
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; NOSSE-NEXT: retl
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%val = load atomic i64, i64* %ptr seq_cst, align 8
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ret i64 %val
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}
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; Same as test2, but with noimplicitfloat.
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define i64 @test3(i64* %ptr) noimplicitfloat {
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; CHECK-LABEL: test3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushl %ebx
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: .cfi_def_cfa_offset 12
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; CHECK-NEXT: .cfi_offset %esi, -12
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; CHECK-NEXT: .cfi_offset %ebx, -8
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: xorl %ebx, %ebx
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; CHECK-NEXT: lock cmpxchg8b (%esi)
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: popl %ebx
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; CHECK-NEXT: .cfi_def_cfa_offset 4
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; CHECK-NEXT: retl
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%val = load atomic i64, i64* %ptr seq_cst, align 8
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ret i64 %val
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}
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define i64 @test4(i64* %ptr) {
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; SSE42-LABEL: test4:
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; SSE42: # %bb.0:
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; SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SSE42-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
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; SSE42-NEXT: movd %xmm0, %eax
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; SSE42-NEXT: pextrd $1, %xmm0, %edx
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; SSE42-NEXT: retl
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;
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; NOSSE-LABEL: test4:
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; NOSSE: # %bb.0:
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; NOSSE-NEXT: pushl %ebp
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; NOSSE-NEXT: .cfi_def_cfa_offset 8
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; NOSSE-NEXT: .cfi_offset %ebp, -8
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; NOSSE-NEXT: movl %esp, %ebp
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; NOSSE-NEXT: .cfi_def_cfa_register %ebp
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; NOSSE-NEXT: andl $-8, %esp
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; NOSSE-NEXT: subl $8, %esp
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; NOSSE-NEXT: movl 8(%ebp), %eax
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; NOSSE-NEXT: fildll (%eax)
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; NOSSE-NEXT: fistpll (%esp)
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; NOSSE-NEXT: movl (%esp), %eax
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; NOSSE-NEXT: movl {{[0-9]+}}(%esp), %edx
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; NOSSE-NEXT: movl %ebp, %esp
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; NOSSE-NEXT: popl %ebp
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; NOSSE-NEXT: .cfi_def_cfa %esp, 4
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; NOSSE-NEXT: retl
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%val = load atomic volatile i64, i64* %ptr seq_cst, align 8
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ret i64 %val
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}
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