160 lines
7.7 KiB
LLVM
160 lines
7.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx,+f16c -show-mc-encoding -disable-peephole | FileCheck %s --check-prefixes=AVX,X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+f16c -show-mc-encoding -disable-peephole | FileCheck %s --check-prefixes=AVX,X64
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl -show-mc-encoding -disable-peephole | FileCheck %s --check-prefixes=AVX512VL,X86-AVX512VL
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl -show-mc-encoding -disable-peephole | FileCheck %s --check-prefixes=AVX512VL,X64-AVX512VL
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define <8 x i16> @test_x86_vcvtps2ph_128(<4 x float> %a0) {
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; AVX-LABEL: test_x86_vcvtps2ph_128:
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; AVX: # %bb.0:
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; AVX-NEXT: vcvtps2ph $0, %xmm0, %xmm0 # encoding: [0xc4,0xe3,0x79,0x1d,0xc0,0x00]
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; AVX-NEXT: ret{{[l|q]}} # encoding: [0xc3]
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;
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; AVX512VL-LABEL: test_x86_vcvtps2ph_128:
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; AVX512VL: # %bb.0:
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; AVX512VL-NEXT: vcvtps2ph $0, %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x79,0x1d,0xc0,0x00]
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; AVX512VL-NEXT: ret{{[l|q]}} # encoding: [0xc3]
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%res = call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %a0, i32 0) ; <<8 x i16>> [#uses=1]
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ret <8 x i16> %res
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}
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declare <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float>, i32) nounwind readonly
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define <8 x i16> @test_x86_vcvtps2ph_256(<8 x float> %a0) {
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; AVX-LABEL: test_x86_vcvtps2ph_256:
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; AVX: # %bb.0:
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; AVX-NEXT: vcvtps2ph $0, %ymm0, %xmm0 # encoding: [0xc4,0xe3,0x7d,0x1d,0xc0,0x00]
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; AVX-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
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; AVX-NEXT: ret{{[l|q]}} # encoding: [0xc3]
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;
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; AVX512VL-LABEL: test_x86_vcvtps2ph_256:
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; AVX512VL: # %bb.0:
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; AVX512VL-NEXT: vcvtps2ph $0, %ymm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x1d,0xc0,0x00]
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; AVX512VL-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
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; AVX512VL-NEXT: ret{{[l|q]}} # encoding: [0xc3]
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%res = call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %a0, i32 0) ; <<8 x i16>> [#uses=1]
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ret <8 x i16> %res
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}
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declare <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float>, i32) nounwind readonly
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define void @test_x86_vcvtps2ph_256_m(<8 x i16>* nocapture %d, <8 x float> %a) nounwind {
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; X86-LABEL: test_x86_vcvtps2ph_256_m:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-NEXT: vcvtps2ph $3, %ymm0, (%eax) # encoding: [0xc4,0xe3,0x7d,0x1d,0x00,0x03]
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; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_x86_vcvtps2ph_256_m:
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; X64: # %bb.0: # %entry
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; X64-NEXT: vcvtps2ph $3, %ymm0, (%rdi) # encoding: [0xc4,0xe3,0x7d,0x1d,0x07,0x03]
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; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
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; X64-NEXT: retq # encoding: [0xc3]
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;
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; X86-AVX512VL-LABEL: test_x86_vcvtps2ph_256_m:
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; X86-AVX512VL: # %bb.0: # %entry
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; X86-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-AVX512VL-NEXT: vcvtps2ph $3, %ymm0, (%eax) # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x1d,0x00,0x03]
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; X86-AVX512VL-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
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; X86-AVX512VL-NEXT: retl # encoding: [0xc3]
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;
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; X64-AVX512VL-LABEL: test_x86_vcvtps2ph_256_m:
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; X64-AVX512VL: # %bb.0: # %entry
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; X64-AVX512VL-NEXT: vcvtps2ph $3, %ymm0, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x1d,0x07,0x03]
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; X64-AVX512VL-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
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; X64-AVX512VL-NEXT: retq # encoding: [0xc3]
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entry:
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%0 = tail call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %a, i32 3)
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store <8 x i16> %0, <8 x i16>* %d, align 16
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ret void
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}
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define void @test_x86_vcvtps2ph_128_m(<4 x i16>* nocapture %d, <4 x float> %a) nounwind {
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; X86-LABEL: test_x86_vcvtps2ph_128_m:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-NEXT: vcvtps2ph $3, %xmm0, (%eax) # encoding: [0xc4,0xe3,0x79,0x1d,0x00,0x03]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_x86_vcvtps2ph_128_m:
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; X64: # %bb.0: # %entry
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; X64-NEXT: vcvtps2ph $3, %xmm0, (%rdi) # encoding: [0xc4,0xe3,0x79,0x1d,0x07,0x03]
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; X64-NEXT: retq # encoding: [0xc3]
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;
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; X86-AVX512VL-LABEL: test_x86_vcvtps2ph_128_m:
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; X86-AVX512VL: # %bb.0: # %entry
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; X86-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-AVX512VL-NEXT: vcvtps2ph $3, %xmm0, (%eax) # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x79,0x1d,0x00,0x03]
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; X86-AVX512VL-NEXT: retl # encoding: [0xc3]
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;
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; X64-AVX512VL-LABEL: test_x86_vcvtps2ph_128_m:
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; X64-AVX512VL: # %bb.0: # %entry
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; X64-AVX512VL-NEXT: vcvtps2ph $3, %xmm0, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x79,0x1d,0x07,0x03]
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; X64-AVX512VL-NEXT: retq # encoding: [0xc3]
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entry:
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%0 = tail call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %a, i32 3)
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%1 = shufflevector <8 x i16> %0, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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store <4 x i16> %1, <4 x i16>* %d, align 8
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ret void
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}
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define void @test_x86_vcvtps2ph_128_m2(double* nocapture %hf4x16, <4 x float> %f4X86) #0 {
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; X86-LABEL: test_x86_vcvtps2ph_128_m2:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-NEXT: vcvtps2ph $3, %xmm0, (%eax) # encoding: [0xc4,0xe3,0x79,0x1d,0x00,0x03]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_x86_vcvtps2ph_128_m2:
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; X64: # %bb.0: # %entry
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; X64-NEXT: vcvtps2ph $3, %xmm0, (%rdi) # encoding: [0xc4,0xe3,0x79,0x1d,0x07,0x03]
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; X64-NEXT: retq # encoding: [0xc3]
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;
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; X86-AVX512VL-LABEL: test_x86_vcvtps2ph_128_m2:
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; X86-AVX512VL: # %bb.0: # %entry
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; X86-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-AVX512VL-NEXT: vcvtps2ph $3, %xmm0, (%eax) # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x79,0x1d,0x00,0x03]
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; X86-AVX512VL-NEXT: retl # encoding: [0xc3]
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;
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; X64-AVX512VL-LABEL: test_x86_vcvtps2ph_128_m2:
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; X64-AVX512VL: # %bb.0: # %entry
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; X64-AVX512VL-NEXT: vcvtps2ph $3, %xmm0, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x79,0x1d,0x07,0x03]
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; X64-AVX512VL-NEXT: retq # encoding: [0xc3]
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entry:
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%0 = tail call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %f4X86, i32 3)
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%1 = bitcast <8 x i16> %0 to <2 x double>
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%vecext = extractelement <2 x double> %1, i32 0
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store double %vecext, double* %hf4x16, align 8
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ret void
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}
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define void @test_x86_vcvtps2ph_128_m3(i64* nocapture %hf4x16, <4 x float> %f4X86) #0 {
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; X86-LABEL: test_x86_vcvtps2ph_128_m3:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-NEXT: vcvtps2ph $3, %xmm0, (%eax) # encoding: [0xc4,0xe3,0x79,0x1d,0x00,0x03]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_x86_vcvtps2ph_128_m3:
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; X64: # %bb.0: # %entry
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; X64-NEXT: vcvtps2ph $3, %xmm0, (%rdi) # encoding: [0xc4,0xe3,0x79,0x1d,0x07,0x03]
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; X64-NEXT: retq # encoding: [0xc3]
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;
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; X86-AVX512VL-LABEL: test_x86_vcvtps2ph_128_m3:
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; X86-AVX512VL: # %bb.0: # %entry
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; X86-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-AVX512VL-NEXT: vcvtps2ph $3, %xmm0, (%eax) # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x79,0x1d,0x00,0x03]
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; X86-AVX512VL-NEXT: retl # encoding: [0xc3]
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;
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; X64-AVX512VL-LABEL: test_x86_vcvtps2ph_128_m3:
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; X64-AVX512VL: # %bb.0: # %entry
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; X64-AVX512VL-NEXT: vcvtps2ph $3, %xmm0, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x79,0x1d,0x07,0x03]
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; X64-AVX512VL-NEXT: retq # encoding: [0xc3]
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entry:
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%0 = tail call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %f4X86, i32 3)
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%1 = bitcast <8 x i16> %0 to <2 x i64>
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%vecext = extractelement <2 x i64> %1, i32 0
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store i64 %vecext, i64* %hf4x16, align 8
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ret void
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}
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