90 lines
		
	
	
		
			3.4 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			90 lines
		
	
	
		
			3.4 KiB
		
	
	
	
		
			LLVM
		
	
	
	
| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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| ; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2   | FileCheck %s --check-prefix=SSE2
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| ; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE4
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| ; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx    | FileCheck %s --check-prefix=AVX1
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| ; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2   | FileCheck %s --check-prefix=AVX2
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| 
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| define <4 x i64> @PR45808(<4 x i64> %0, <4 x i64> %1) {
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| ; SSE2-LABEL: PR45808:
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| ; SSE2:       # %bb.0:
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| ; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [2147483648,2147483648]
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| ; SSE2-NEXT:    movdqa %xmm3, %xmm5
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| ; SSE2-NEXT:    pxor %xmm4, %xmm5
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| ; SSE2-NEXT:    movdqa %xmm1, %xmm6
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| ; SSE2-NEXT:    pxor %xmm4, %xmm6
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| ; SSE2-NEXT:    movdqa %xmm6, %xmm7
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| ; SSE2-NEXT:    pcmpgtd %xmm5, %xmm7
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| ; SSE2-NEXT:    pcmpeqd %xmm5, %xmm6
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| ; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm6[1,1,3,3]
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| ; SSE2-NEXT:    pand %xmm7, %xmm5
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| ; SSE2-NEXT:    pshufd {{.*#+}} xmm6 = xmm7[1,1,3,3]
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| ; SSE2-NEXT:    por %xmm5, %xmm6
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| ; SSE2-NEXT:    movdqa %xmm2, %xmm5
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| ; SSE2-NEXT:    pxor %xmm4, %xmm5
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| ; SSE2-NEXT:    pxor %xmm0, %xmm4
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| ; SSE2-NEXT:    movdqa %xmm4, %xmm7
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| ; SSE2-NEXT:    pcmpgtd %xmm5, %xmm7
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| ; SSE2-NEXT:    pcmpeqd %xmm5, %xmm4
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| ; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
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| ; SSE2-NEXT:    pand %xmm7, %xmm4
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| ; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm7[1,1,3,3]
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| ; SSE2-NEXT:    por %xmm4, %xmm5
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| ; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm5[0,2,2,3]
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| ; SSE2-NEXT:    pxor {{.*}}(%rip), %xmm4
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| ; SSE2-NEXT:    psllq $63, %xmm6
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| ; SSE2-NEXT:    psrad $31, %xmm6
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| ; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm6[1,1,3,3]
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| ; SSE2-NEXT:    pand %xmm5, %xmm1
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| ; SSE2-NEXT:    pandn %xmm3, %xmm5
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| ; SSE2-NEXT:    por %xmm5, %xmm1
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| ; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[0,1,1,3]
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| ; SSE2-NEXT:    psllq $63, %xmm3
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| ; SSE2-NEXT:    psrad $31, %xmm3
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| ; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
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| ; SSE2-NEXT:    pand %xmm3, %xmm0
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| ; SSE2-NEXT:    pandn %xmm2, %xmm3
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| ; SSE2-NEXT:    por %xmm3, %xmm0
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| ; SSE2-NEXT:    retq
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| ;
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| ; SSE4-LABEL: PR45808:
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| ; SSE4:       # %bb.0:
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| ; SSE4-NEXT:    movdqa %xmm0, %xmm4
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| ; SSE4-NEXT:    movdqa %xmm1, %xmm0
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| ; SSE4-NEXT:    pcmpgtq %xmm3, %xmm0
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| ; SSE4-NEXT:    movdqa %xmm4, %xmm5
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| ; SSE4-NEXT:    pcmpgtq %xmm2, %xmm5
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| ; SSE4-NEXT:    pshufd {{.*#+}} xmm5 = xmm5[0,2,2,3]
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| ; SSE4-NEXT:    pcmpeqd %xmm6, %xmm6
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| ; SSE4-NEXT:    pxor %xmm5, %xmm6
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| ; SSE4-NEXT:    psllq $63, %xmm0
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| ; SSE4-NEXT:    blendvpd %xmm0, %xmm1, %xmm3
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| ; SSE4-NEXT:    pmovzxdq {{.*#+}} xmm0 = xmm6[0],zero,xmm6[1],zero
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| ; SSE4-NEXT:    psllq $63, %xmm0
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| ; SSE4-NEXT:    blendvpd %xmm0, %xmm4, %xmm2
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| ; SSE4-NEXT:    movapd %xmm2, %xmm0
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| ; SSE4-NEXT:    movapd %xmm3, %xmm1
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| ; SSE4-NEXT:    retq
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| ;
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| ; AVX1-LABEL: PR45808:
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| ; AVX1:       # %bb.0:
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| ; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
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| ; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
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| ; AVX1-NEXT:    vpcmpgtq %xmm2, %xmm3, %xmm2
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| ; AVX1-NEXT:    vpcmpgtq %xmm1, %xmm0, %xmm3
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| ; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm3, %ymm2
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| ; AVX1-NEXT:    vxorpd {{.*}}(%rip), %ymm2, %ymm2
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| ; AVX1-NEXT:    vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
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| ; AVX1-NEXT:    retq
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| ;
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| ; AVX2-LABEL: PR45808:
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| ; AVX2:       # %bb.0:
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| ; AVX2-NEXT:    vpcmpgtq %ymm1, %ymm0, %ymm2
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| ; AVX2-NEXT:    vpxor {{.*}}(%rip), %ymm2, %ymm2
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| ; AVX2-NEXT:    vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
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| ; AVX2-NEXT:    retq
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|   %3 = icmp sgt <4 x i64> %0, %1
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|   %4 = xor <4 x i1> %3, <i1 true, i1 true, i1 false, i1 false>
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|   %5 = select <4 x i1> %4, <4 x i64> %0, <4 x i64> %1
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|   ret <4 x i64> %5
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| }
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