| .. |
|
AsmParser
|
[Target] Use std::nullopt instead of None (NFC)
|
2022-12-02 20:36:06 -08:00 |
|
Disassembler
|
[Target] Use std::nullopt instead of None (NFC)
|
2022-12-02 20:36:06 -08:00 |
|
MCA
|
[MCA] Introducing incremental SourceMgr and resumable pipeline
|
2022-06-24 15:39:51 -07:00 |
|
MCTargetDesc
|
[Target] Use std::nullopt instead of None (NFC)
|
2022-12-02 20:36:06 -08:00 |
|
TargetInfo
|
…
|
|
|
Utils
|
[Target] Use std::nullopt instead of None (NFC)
|
2022-12-02 20:36:06 -08:00 |
|
AMDGPU.h
|
AMDGPU: Add a pass to rewrite certain undef in PHI
|
2022-09-26 09:54:47 +08:00 |
|
AMDGPU.td
|
[AMDGPU][AsmParser] Refine parsing instruction operands.
|
2022-11-24 10:50:26 +00:00 |
|
AMDGPUAliasAnalysis.cpp
|
[AliasAnalysis] Introduce getModRefInfoMask() as a generalization of pointsToConstantMemory().
|
2022-10-31 13:03:41 -07:00 |
|
AMDGPUAliasAnalysis.h
|
[AliasAnalysis] Introduce getModRefInfoMask() as a generalization of pointsToConstantMemory().
|
2022-10-31 13:03:41 -07:00 |
|
AMDGPUAlwaysInlinePass.cpp
|
…
|
|
|
AMDGPUAnnotateKernelFeatures.cpp
|
…
|
|
|
AMDGPUAnnotateUniformValues.cpp
|
…
|
|
|
AMDGPUArgumentUsageInfo.cpp
|
[amdgpu] Implement lds kernel id intrinsic
|
2022-07-19 17:46:19 +01:00 |
|
AMDGPUArgumentUsageInfo.h
|
[amdgpu] Implement lds kernel id intrinsic
|
2022-07-19 17:46:19 +01:00 |
|
AMDGPUAsmPrinter.cpp
|
[NFC] Add helper method to ensure min alignment on MCSection
|
2022-11-28 10:00:34 +00:00 |
|
AMDGPUAsmPrinter.h
|
[AMDGPU] Add remarks to output some resource usage
|
2022-07-15 11:01:53 -07:00 |
|
AMDGPUAtomicOptimizer.cpp
|
AMDGPU: Create poison values instead of undef
|
2022-11-16 14:47:24 -08:00 |
|
AMDGPUAttributes.def
|
[amdgpu] Implement lds kernel id intrinsic
|
2022-07-19 17:46:19 +01:00 |
|
AMDGPUAttributor.cpp
|
[Attributor] Teach AAPointerInfo to look into aggregates
|
2022-10-05 06:19:47 -07:00 |
|
AMDGPUCallLowering.cpp
|
[Target] Use std::nullopt instead of None (NFC)
|
2022-12-02 20:36:06 -08:00 |
|
AMDGPUCallLowering.h
|
…
|
|
|
AMDGPUCallingConv.td
|
[AMDGPU][NFC] Refactor AMDGPUCallingConv.td
|
2022-06-01 16:24:09 +00:00 |
|
AMDGPUCodeGenPrepare.cpp
|
AMDGPU: Create poison values instead of undef
|
2022-11-16 14:47:24 -08:00 |
|
AMDGPUCombine.td
|
[GlobalISel] Add Predicates to GICombineRule
|
2022-10-26 07:13:40 +00:00 |
|
AMDGPUCombinerHelper.cpp
|
…
|
|
|
AMDGPUCombinerHelper.h
|
…
|
|
|
AMDGPUCtorDtorLowering.cpp
|
AMDGPU: Code simplification for ctor/dtor lowering
|
2022-11-28 15:39:50 -05:00 |
|
AMDGPUExportClustering.cpp
|
…
|
|
|
AMDGPUExportClustering.h
|
…
|
|
|
AMDGPUFeatures.td
|
…
|
|
|
AMDGPUFrameLowering.cpp
|
[NFC][AMDGPU] Fix typo.
|
2022-08-20 08:30:42 +02:00 |
|
AMDGPUFrameLowering.h
|
…
|
|
|
AMDGPUGISel.td
|
[AMDGPU][CodeGen] Support raw format TFE buffer loads other than byte, short and d16 ones.
|
2022-11-24 10:50:26 +00:00 |
|
AMDGPUGenRegisterBankInfo.def
|
[AMDGPU] Add support for new LLVM vector types
|
2022-11-29 17:02:04 +01:00 |
|
AMDGPUGlobalISelUtils.cpp
|
[AMDGPU][NFC] Remove isLegalVOP3PShuffleMask
|
2022-11-22 14:31:59 +00:00 |
|
AMDGPUGlobalISelUtils.h
|
[AMDGPU][NFC] Remove isLegalVOP3PShuffleMask
|
2022-11-22 14:31:59 +00:00 |
|
AMDGPUHSAMetadataStreamer.cpp
|
[Target] Use std::nullopt instead of None (NFC)
|
2022-12-02 20:36:06 -08:00 |
|
AMDGPUHSAMetadataStreamer.h
|
[Target] Use std::nullopt instead of None (NFC)
|
2022-12-02 20:36:06 -08:00 |
|
AMDGPUIGroupLP.cpp
|
[Target] Use std::nullopt instead of None (NFC)
|
2022-12-02 20:36:06 -08:00 |
|
AMDGPUIGroupLP.h
|
[AMDGPU] Add iglp_opt builtin and MFMA GEMM Opt strategy
|
2022-08-19 15:38:36 -07:00 |
|
AMDGPUISelDAGToDAG.cpp
|
[AMDGPU] Remove AMDGPUISelDAGToDAG::isKnownNeverNaN
|
2022-11-30 07:58:32 +01:00 |
|
AMDGPUISelDAGToDAG.h
|
[AMDGPU] Remove AMDGPUISelDAGToDAG::isKnownNeverNaN
|
2022-11-30 07:58:32 +01:00 |
|
AMDGPUISelLowering.cpp
|
[Target] Use std::nullopt instead of None (NFC)
|
2022-12-02 20:36:06 -08:00 |
|
AMDGPUISelLowering.h
|
[AMDGPU][CodeGen] Support raw format TFE buffer loads other than byte, short and d16 ones.
|
2022-11-24 10:50:26 +00:00 |
|
AMDGPUInsertDelayAlu.cpp
|
[AMDGPU] New AMDGPUInsertDelayAlu pass
|
2022-06-29 21:30:20 +01:00 |
|
AMDGPUInstCombineIntrinsic.cpp
|
[Target] Use std::nullopt instead of None (NFC)
|
2022-12-02 20:36:06 -08:00 |
|
AMDGPUInstrInfo.cpp
|
…
|
|
|
AMDGPUInstrInfo.h
|
…
|
|
|
AMDGPUInstrInfo.td
|
[AMDGPU] Add llvm.is.fpclass intrinsic to existing SelectionDAG fp
|
2022-11-28 16:00:36 -05:00 |
|
AMDGPUInstructionSelector.cpp
|
[Target] Use std::nullopt instead of None (NFC)
|
2022-12-02 20:36:06 -08:00 |
|
AMDGPUInstructionSelector.h
|
[AMDGPU][GISel] Select llvm.amdgcn.fcmp intrinsics
|
2022-11-22 14:18:58 +00:00 |
|
AMDGPUInstructions.td
|
[AMDGPU] Use V_PERM to match buildvectors when inputs are not canonicalized (i.e. can't use V_PACK)
|
2022-10-03 12:58:29 -07:00 |
|
AMDGPULateCodeGenPrepare.cpp
|
…
|
|
|
AMDGPULegalizerInfo.cpp
|
[AMDGPU] Use aperture registers instead of S_GETREG
|
2022-11-30 12:25:10 +00:00 |
|
AMDGPULegalizerInfo.h
|
[AMDGPU] Always lower SHUFFLE_VECTOR
|
2022-10-04 14:23:17 +00:00 |
|
AMDGPULibCalls.cpp
|
try to fix build yet more after 16544cbe64
|
2022-09-28 15:40:52 -04:00 |
|
AMDGPULibFunc.cpp
|
[TableGen] Use MemoryEffects to represent intrinsic memory effects (NFCI)
|
2022-11-14 10:52:04 +01:00 |
|
AMDGPULibFunc.h
|
…
|
|
|
AMDGPULowerIntrinsics.cpp
|
[iwyu] Handle regressions in libLLVM header include
|
2022-05-04 08:32:38 +02:00 |
|
AMDGPULowerKernelArguments.cpp
|
[Target] Use std::nullopt instead of None (NFC)
|
2022-12-02 20:36:06 -08:00 |
|
AMDGPULowerKernelAttributes.cpp
|
[NFC][AMDGPULowerKernelAttributes] Factorize repeated code into function
|
2022-10-05 09:26:39 -05:00 |
|
AMDGPULowerModuleLDSPass.cpp
|
Revert "[amdgpu][lds] Use the same isKernel predicate consistently"
|
2022-11-09 16:54:20 +00:00 |
|
AMDGPUMCInstLower.cpp
|
[AMDGPU] Add iglp_opt builtin and MFMA GEMM Opt strategy
|
2022-08-19 15:38:36 -07:00 |
|
AMDGPUMCInstLower.h
|
AMDGPU: Fix missing c++ mode comment
|
2022-06-01 21:14:48 -04:00 |
|
AMDGPUMIRFormatter.cpp
|
AMDGPU: Remove ImagePSV and move images to addrspace 7
|
2022-11-30 11:32:34 +01:00 |
|
AMDGPUMIRFormatter.h
|
[llvm] Remove redundaunt virtual specifiers (NFC)
|
2022-07-24 21:50:35 -07:00 |
|
AMDGPUMachineCFGStructurizer.cpp
|
[Target] Qualify auto in range-based for loops (NFC)
|
2022-08-28 10:41:50 -07:00 |
|
AMDGPUMachineFunction.cpp
|
[AMDGPU] Move SIModeRegisterDefaults to SI MFI
|
2022-09-28 13:13:40 -07:00 |
|
AMDGPUMachineFunction.h
|
[AMDGPU] Move SIModeRegisterDefaults to SI MFI
|
2022-09-28 13:13:40 -07:00 |
|
AMDGPUMachineModuleInfo.cpp
|
…
|
|
|
AMDGPUMachineModuleInfo.h
|
[Target] Use std::nullopt instead of None (NFC)
|
2022-12-02 20:36:06 -08:00 |
|
AMDGPUMacroFusion.cpp
|
…
|
|
|
AMDGPUMacroFusion.h
|
…
|
|
|
AMDGPUOpenCLEnqueuedBlockLowering.cpp
|
[Target] Qualify auto in range-based for loops (NFC)
|
2022-08-28 10:41:50 -07:00 |
|
AMDGPUPTNote.h
|
…
|
|
|
AMDGPUPerfHintAnalysis.cpp
|
[AMDGPU] Set amdgpu-memory-bound if a basic block has dense global memory access
|
2022-07-19 15:16:28 +05:30 |
|
AMDGPUPerfHintAnalysis.h
|
[AMDGPU] Set amdgpu-memory-bound if a basic block has dense global memory access
|
2022-07-19 15:16:28 +05:30 |
|
AMDGPUPostLegalizerCombiner.cpp
|
[GlobalISel] Add Predicates to GICombineRule
|
2022-10-26 07:13:40 +00:00 |
|
AMDGPUPreLegalizerCombiner.cpp
|
AMDGPU/GlobalISel: Fix combine crash because LI is not set in prelegalizer
|
2022-11-08 12:46:16 +01:00 |
|
AMDGPUPrintfRuntimeBinding.cpp
|
[Target] Qualify auto in range-based for loops (NFC)
|
2022-08-28 10:41:50 -07:00 |
|
AMDGPUPromoteAlloca.cpp
|
[Target] Use std::nullopt instead of None (NFC)
|
2022-12-02 20:36:06 -08:00 |
|
AMDGPUPromoteKernelArguments.cpp
|
…
|
|
|
AMDGPUPropagateAttributes.cpp
|
[llvm] Use std::size (NFC)
|
2022-11-26 13:47:32 -08:00 |
|
AMDGPURegBankCombiner.cpp
|
[GlobalISel] Allow prelegalizer combiners to have access to LegalizerInfo.
|
2022-10-03 07:36:18 +01:00 |
|
AMDGPURegisterBankInfo.cpp
|
[AMDGPU] Add llvm.is.fpclass intrinsic to existing SelectionDAG fp
|
2022-11-28 16:00:36 -05:00 |
|
AMDGPURegisterBankInfo.h
|
AMDGPU: Add G_AMDGPU_MAD_64_32 instructions
|
2022-05-27 12:36:17 -05:00 |
|
AMDGPURegisterBanks.td
|
[AMDGPU] Add support for new LLVM vector types
|
2022-11-29 17:02:04 +01:00 |
|
AMDGPUReleaseVGPRs.cpp
|
[Target] Use std::nullopt instead of None (NFC)
|
2022-12-02 20:36:06 -08:00 |
|
AMDGPUReplaceLDSUseWithPointer.cpp
|
[amdgpu][nfc] Factor predicate out of findLDSVariablesToLower
|
2022-08-31 15:44:51 +01:00 |
|
AMDGPUResourceUsageAnalysis.cpp
|
[AMDGPU] Add support for new LLVM vector types
|
2022-11-29 17:02:04 +01:00 |
|
AMDGPUResourceUsageAnalysis.h
|
…
|
|
|
AMDGPURewriteOutArguments.cpp
|
AMDGPU: Create poison values instead of undef
|
2022-11-16 14:47:24 -08:00 |
|
AMDGPURewriteUndefForPHI.cpp
|
Add override for runOnFunction()
|
2022-09-26 10:19:35 +08:00 |
|
AMDGPUSearchableTables.td
|
[AMDGPU] Support for gfx940 fp8 smfmac
|
2022-07-18 12:12:41 -07:00 |
|
AMDGPUSetWavePriority.cpp
|
[AMDGPU][SetWavePriority] Fix dealing with MBBInfo records.
|
2022-09-30 14:27:50 +01:00 |
|
AMDGPUSubtarget.cpp
|
[Target] Use std::nullopt instead of None (NFC)
|
2022-12-02 20:36:06 -08:00 |
|
AMDGPUSubtarget.h
|
[AMDGPU] gfx11 subtarget features & early tests
|
2022-05-11 10:31:49 -04:00 |
|
AMDGPUTargetMachine.cpp
|
CodeGen/CommandFlags: Convert Optional to std::optional
|
2022-12-03 18:38:12 +00:00 |
|
AMDGPUTargetMachine.h
|
CodeGen/CommandFlags: Convert Optional to std::optional
|
2022-12-03 18:38:12 +00:00 |
|
AMDGPUTargetObjectFile.cpp
|
…
|
|
|
AMDGPUTargetObjectFile.h
|
…
|
|
|
AMDGPUTargetTransformInfo.cpp
|
TargetTransformInfo: convert Optional to std::optional
|
2022-12-02 11:42:15 -08:00 |
|
AMDGPUTargetTransformInfo.h
|
[Target] Use std::nullopt instead of None (NFC)
|
2022-12-02 20:36:06 -08:00 |
|
AMDGPUUnifyDivergentExitNodes.cpp
|
[AMDGPU] Unify uniform return and divergent unreachable blocks
|
2022-11-29 13:25:56 -06:00 |
|
AMDGPUUnifyMetadata.cpp
|
[Target] Qualify auto in range-based for loops (NFC)
|
2022-08-28 10:41:50 -07:00 |
|
AMDKernelCodeT.h
|
…
|
|
|
BUFInstructions.td
|
[AMDGPU][CodeGen] Support raw format TFE buffer loads other than byte, short and d16 ones.
|
2022-11-24 10:50:26 +00:00 |
|
CMakeLists.txt
|
AMDGPU: Add a pass to rewrite certain undef in PHI
|
2022-09-26 09:54:47 +08:00 |
|
CaymanInstructions.td
|
…
|
|
|
DSInstructions.td
|
[AMDGPU] Pattern for flat atomic fadd f64 intrinsic with local addr
|
2022-09-25 13:25:41 +02:00 |
|
EXPInstructions.td
|
[AMDGPU] Add new GFX11 intrinsic llvm.amdgcn.exp.row
|
2022-06-16 18:23:14 +01:00 |
|
EvergreenInstructions.td
|
R600: Remove broken atomicrmw patterns
|
2022-11-04 16:14:04 -07:00 |
|
FLATInstructions.td
|
AMDGPU: Use tablegen patterns for buffer global and flat atomic fadd
|
2022-09-23 17:52:10 +02:00 |
|
GCNCreateVOPD.cpp
|
[AMDGPU][GFX11][NFC] Refactor VOPD operands handling (part 2)
|
2022-11-18 14:15:05 +03:00 |
|
GCNDPPCombine.cpp
|
[AMDGPU] Add & use `hasNamedOperand`, NFC
|
2022-11-08 07:57:21 +00:00 |
|
GCNHazardRecognizer.cpp
|
[AMDGPU] Remove isLiteralConstant and isLiteralConstantLike
|
2022-11-17 16:45:48 +00:00 |
|
GCNHazardRecognizer.h
|
[AMDGPU][GFX11] Mitigate VALU mask write hazard
|
2022-10-01 16:21:24 +09:00 |
|
GCNILPSched.cpp
|
[llvm] Qualify auto in range-based for loops (NFC)
|
2022-08-13 12:55:42 -07:00 |
|
GCNIterativeScheduler.cpp
|
[AMDGPU] Refactor debug printing routines for GCNRPTracker
|
2022-10-28 04:22:46 +02:00 |
|
GCNIterativeScheduler.h
|
…
|
|
|
GCNMinRegStrategy.cpp
|
[llvm] Qualify auto in range-based for loops (NFC)
|
2022-08-13 12:55:42 -07:00 |
|
GCNNSAReassign.cpp
|
[AMDGPU] GFX11 CodeGen support for MIMG instructions
|
2022-06-16 18:23:14 +01:00 |
|
GCNPreRAOptimizations.cpp
|
…
|
|
|
GCNProcessors.td
|
[AMDGPU] user-sgpr-init16-bug does not apply to gfx1103
|
2022-07-29 14:21:13 +01:00 |
|
GCNRegPressure.cpp
|
Revert "[AMDGPU] Speedup GCNDownwardRPTracker::advanceBeforeNext"
|
2022-12-02 14:18:16 +00:00 |
|
GCNRegPressure.h
|
[AMDGPU] Fix GCNDownwardRPTracker::advanceBeforeNext at the end of MBB
|
2022-11-03 11:52:56 +01:00 |
|
GCNSchedStrategy.cpp
|
[AMDGPU] Scheduler: Don't revert the schedule if the register pressure isn't changed for a region
|
2022-12-02 15:59:38 +01:00 |
|
GCNSchedStrategy.h
|
[AMDGPU] Add iglp_opt builtin and MFMA GEMM Opt strategy
|
2022-08-19 15:38:36 -07:00 |
|
GCNSubtarget.h
|
[AMDGPU] Use GCNSubtarget::hasInstPrefetch instead of generation check. NFC.
|
2022-11-29 17:36:33 +00:00 |
|
GCNVOPDUtils.cpp
|
[AMDGPU][GFX11][NFC] Refactor VOPD operands handling (part 2)
|
2022-11-18 14:15:05 +03:00 |
|
GCNVOPDUtils.h
|
[AMDGPU] gfx11 Generate VOPD Instructions
|
2022-07-05 09:18:19 -04:00 |
|
InstCombineTables.td
|
…
|
|
|
LDSDIRInstructions.td
|
[AMDGPU] gfx11 ldsdir intrinsics and ISel
|
2022-06-17 09:03:16 -04:00 |
|
MIMGInstructions.td
|
[AMDGPU] Remove todo about vector types
|
2022-11-30 14:13:12 +01:00 |
|
R600.h
|
…
|
|
|
R600.td
|
[AMDGPU] Fix useDeprecatedPositionallyEncodedOperands errors in R600.
|
2022-09-25 17:55:09 -04:00 |
|
R600AsmPrinter.cpp
|
[llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFC
|
2022-08-08 11:24:15 -07:00 |
|
R600AsmPrinter.h
|
…
|
|
|
R600ClauseMergePass.cpp
|
…
|
|
|
R600ControlFlowFinalizer.cpp
|
[llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFC
|
2022-08-08 11:24:15 -07:00 |
|
R600Defines.h
|
…
|
|
|
R600EmitClauseMarkers.cpp
|
…
|
|
|
R600ExpandSpecialInstrs.cpp
|
…
|
|
|
R600FrameLowering.cpp
|
…
|
|
|
R600FrameLowering.h
|
…
|
|
|
R600ISelDAGToDAG.cpp
|
…
|
|
|
R600ISelLowering.cpp
|
[SelectionDAG] Remove deprecated MemSDNode->getAlignment()
|
2022-11-23 09:04:42 +00:00 |
|
R600ISelLowering.h
|
[AMDGPU] Allow finer grain control of an unaligned access speed
|
2022-11-17 09:23:53 -08:00 |
|
R600InstrFormats.td
|
…
|
|
|
R600InstrInfo.cpp
|
CodeGen: Move getAddressSpaceForPseudoSourceKind into TargetMachine
|
2022-06-01 09:45:40 -04:00 |
|
R600InstrInfo.h
|
CodeGen: Move getAddressSpaceForPseudoSourceKind into TargetMachine
|
2022-06-01 09:45:40 -04:00 |
|
R600InstrInfo.td
|
…
|
|
|
R600Instructions.td
|
[AMDGPU] Fix useDeprecatedPositionallyEncodedOperands errors in R600.
|
2022-09-25 17:55:09 -04:00 |
|
R600MCInstLower.cpp
|
[CodeGen] Move instruction predicate verification to emitInstruction
|
2022-07-14 09:33:28 +01:00 |
|
R600MachineCFGStructurizer.cpp
|
[AMDGPU] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off builds
|
2022-04-19 22:36:58 -07:00 |
|
R600MachineFunctionInfo.cpp
|
…
|
|
|
R600MachineFunctionInfo.h
|
…
|
|
|
R600MachineScheduler.cpp
|
…
|
|
|
R600MachineScheduler.h
|
…
|
|
|
R600OpenCLImageTypeLoweringPass.cpp
|
…
|
|
|
R600OptimizeVectorRegisters.cpp
|
…
|
|
|
R600Packetizer.cpp
|
…
|
|
|
R600Processors.td
|
…
|
|
|
R600RegisterInfo.cpp
|
PEI should be able to use backward walk in replaceFrameIndicesBackward.
|
2022-11-18 15:57:34 +01:00 |
|
R600RegisterInfo.h
|
PEI should be able to use backward walk in replaceFrameIndicesBackward.
|
2022-11-18 15:57:34 +01:00 |
|
R600RegisterInfo.td
|
…
|
|
|
R600Schedule.td
|
…
|
|
|
R600Subtarget.cpp
|
[AMDGPU] Use default member initializers in Subtarget classes
|
2022-04-12 16:42:30 +01:00 |
|
R600Subtarget.h
|
[AMDGPU] Use default member initializers in Subtarget classes
|
2022-04-12 16:42:30 +01:00 |
|
R600TargetMachine.cpp
|
CodeGen/CommandFlags: Convert Optional to std::optional
|
2022-12-03 18:38:12 +00:00 |
|
R600TargetMachine.h
|
CodeGen/CommandFlags: Convert Optional to std::optional
|
2022-12-03 18:38:12 +00:00 |
|
R600TargetTransformInfo.cpp
|
…
|
|
|
R600TargetTransformInfo.h
|
[AArch64][TTI][NFC] Overload method 'getVectorInstrCost' to provide vector instruction itself, as a context information for cost estimation.
|
2022-08-04 12:58:25 -07:00 |
|
R700Instructions.td
|
…
|
|
|
SIAnnotateControlFlow.cpp
|
AMDGPU: Create poison values instead of undef
|
2022-11-16 14:47:24 -08:00 |
|
SIDefines.h
|
[AMDGPU] Use aperture registers instead of S_GETREG
|
2022-11-30 12:25:10 +00:00 |
|
SIFixSGPRCopies.cpp
|
[AMDGPU] SIFixSGPRCopies reworking to use one pass over the MIR for analysis and lowering.
|
2022-09-19 23:31:45 +02:00 |
|
SIFixVGPRCopies.cpp
|
…
|
|
|
SIFoldOperands.cpp
|
[AMDGPU] Stop looking for implicit M0 uses on MOV instructions
|
2022-11-18 16:57:55 +00:00 |
|
SIFormMemoryClauses.cpp
|
[AMDGPU] Fix RP tracker's live registers after processing a memory clause.
|
2022-11-01 11:47:59 +01:00 |
|
SIFrameLowering.cpp
|
[AMDGPU] Skip stack-arg dbg objects while fixing the dead frame indices
|
2022-11-04 15:28:35 +05:30 |
|
SIFrameLowering.h
|
[AMDGPU] On gfx908, reserve VGPR for AGPR copy based on register budget.
|
2022-04-21 07:57:26 +05:30 |
|
SIISelLowering.cpp
|
[AMDGPU] Use s_cmp instead of s_cmpk
|
2022-11-30 18:02:39 +00:00 |
|
SIISelLowering.h
|
[AMDGPU] Allow finer grain control of an unaligned access speed
|
2022-11-17 09:23:53 -08:00 |
|
SIInsertHardClauses.cpp
|
[AMDGPU] Update SIInsertHardClauses for GFX11
|
2022-06-09 21:29:56 +01:00 |
|
SIInsertWaitcnts.cpp
|
[AMDGPU][InsertWaits] No wait for WAW for global/scratch_load
|
2022-11-23 09:57:50 +08:00 |
|
SIInstrFormats.td
|
[AMDGPU][MC][GFX11] Correct disassembly of *_e64_dpp opcodes which support op_sel
|
2022-07-15 13:11:59 +03:00 |
|
SIInstrInfo.cpp
|
[AMDGPU] Add support for new LLVM vector types
|
2022-11-29 17:02:04 +01:00 |
|
SIInstrInfo.h
|
[AMDGPU] Remove isLiteralConstant and isLiteralConstantLike
|
2022-11-17 16:45:48 +00:00 |
|
SIInstrInfo.td
|
[AMDGPU][AsmParser] Refine parsing instruction operands.
|
2022-11-24 10:50:26 +00:00 |
|
SIInstructions.td
|
[AMDGPU] Add support for new LLVM vector types
|
2022-11-29 17:02:04 +01:00 |
|
SILateBranchLowering.cpp
|
[Target] Qualify auto in range-based for loops (NFC)
|
2022-08-28 10:41:50 -07:00 |
|
SILoadStoreOptimizer.cpp
|
[Target] Use std::nullopt instead of None (NFC)
|
2022-12-02 20:36:06 -08:00 |
|
SILowerControlFlow.cpp
|
[AMDGPU] SILowerControlFlow uses LiveIntervals
|
2022-07-12 16:53:53 +01:00 |
|
SILowerI1Copies.cpp
|
AMDGPU: Factor out hasDivergentBranch(). NFC
|
2022-09-14 13:27:21 +08:00 |
|
SILowerSGPRSpills.cpp
|
[AMDGPU] Skip stack-arg dbg objects while fixing the dead frame indices
|
2022-11-04 15:28:35 +05:30 |
|
SIMachineFunctionInfo.cpp
|
[Target] Use std::nullopt instead of None (NFC)
|
2022-12-02 20:36:06 -08:00 |
|
SIMachineFunctionInfo.h
|
AMDGPU: Remove ImagePSV and move images to addrspace 7
|
2022-11-30 11:32:34 +01:00 |
|
SIMachineScheduler.cpp
|
[AMDGPU] SIMachineScheduler: Add support for several MachineScheduler features
|
2022-07-14 09:45:31 +02:00 |
|
SIMachineScheduler.h
|
…
|
|
|
SIMemoryLegalizer.cpp
|
[Target] Use std::nullopt instead of None (NFC)
|
2022-12-02 20:36:06 -08:00 |
|
SIModeRegister.cpp
|
[AMDGPU][GFX11] Use VGPR_32_Lo128 for VOP1,2,C
|
2022-09-20 09:56:28 -04:00 |
|
SIOptimizeExecMasking.cpp
|
[NFC][AMDGPU] Some cleanups in the SIOptimizeExecMasking pass.
|
2022-08-23 18:16:47 +02:00 |
|
SIOptimizeExecMaskingPreRA.cpp
|
AMDGPU: Fix assert when trying to overextend liverange
|
2022-11-04 15:14:43 -07:00 |
|
SIOptimizeVGPRLiveRange.cpp
|
[AMDGPU] Fix duplicated words in comments
|
2022-11-03 15:33:30 +00:00 |
|
SIPeepholeSDWA.cpp
|
[Target] Use std::nullopt instead of None (NFC)
|
2022-12-02 20:36:06 -08:00 |
|
SIPostRABundler.cpp
|
[AMDGPU] Use llvm::any_of (NFC)
|
2022-10-16 09:19:09 -07:00 |
|
SIPreAllocateWWMRegs.cpp
|
[AMDGPU] Add pseudo wavemode to optimize strict_wqm
|
2022-10-28 09:45:17 +09:00 |
|
SIPreEmitPeephole.cpp
|
[Target] Qualify auto in range-based for loops (NFC)
|
2022-08-28 10:41:50 -07:00 |
|
SIProgramInfo.cpp
|
…
|
|
|
SIProgramInfo.h
|
[AMDGPU] Add remarks to output some resource usage
|
2022-07-15 11:01:53 -07:00 |
|
SIRegisterInfo.cpp
|
[AMDGPU] Add support for new LLVM vector types
|
2022-11-29 17:02:04 +01:00 |
|
SIRegisterInfo.h
|
PEI should be able to use backward walk in replaceFrameIndicesBackward.
|
2022-11-18 15:57:34 +01:00 |
|
SIRegisterInfo.td
|
[AMDGPU] Add support for new LLVM vector types
|
2022-11-29 17:02:04 +01:00 |
|
SISchedule.td
|
[AMDGPU] gfx11 subtarget features & early tests
|
2022-05-11 10:31:49 -04:00 |
|
SIShrinkInstructions.cpp
|
[AMDGPU] Add support for new LLVM vector types
|
2022-11-29 17:02:04 +01:00 |
|
SIWholeQuadMode.cpp
|
[AMDGPU] Add pseudo wavemode to optimize strict_wqm
|
2022-10-28 09:45:17 +09:00 |
|
SMInstructions.td
|
[AMDGPU][CodeGen] Support (soffset + offset) s_buffer_load's.
|
2022-09-05 12:53:05 +01:00 |
|
SOPInstructions.td
|
[AMDGPU] Intrinsic to expose s_wait_event for export ready
|
2022-11-28 11:26:15 +00:00 |
|
VIInstrFormats.td
|
[AMDGPU] gfx11 export instructions
|
2022-05-25 14:44:09 -04:00 |
|
VINTERPInstructions.td
|
[AMDGPU][MC][GFX11][NFC] Correct VINTERP src operands
|
2022-11-07 15:52:55 +03:00 |
|
VOP1Instructions.td
|
[AMDGPU] Make V_SAT_PK_U8_I16 a True16 Instruction
|
2022-10-10 10:33:49 -04:00 |
|
VOP2Instructions.td
|
[AMDGPU][MC][GFX11] Disable non-VGPR src operands for VOP3_DPP variants of fmac instructions
|
2022-11-30 14:48:00 +03:00 |
|
VOP3Instructions.td
|
[AMDGPU] Add subtarget feature for MAD_U64/I64 bug on GFX11
|
2022-11-18 18:19:27 +01:00 |
|
VOP3PInstructions.td
|
[AMDGPU][GlobalISel] Support mad/fma_mix selection
|
2022-11-08 08:02:34 +00:00 |
|
VOPCInstructions.td
|
[AMDGPU] Fix location of line break in VOPC instruction table
|
2022-11-30 11:40:36 +00:00 |
|
VOPDInstructions.td
|
[AMDGPU] Fix delay alu for VOPD with src2acc
|
2022-10-25 13:11:17 -04:00 |
|
VOPInstructions.td
|
[AMDGPU] Add llvm.is.fpclass intrinsic to existing SelectionDAG fp
|
2022-11-28 16:00:36 -05:00 |
bac974278c