435 lines
		
	
	
		
			15 KiB
		
	
	
	
		
			C++
		
	
	
	
			
		
		
	
	
			435 lines
		
	
	
		
			15 KiB
		
	
	
	
		
			C++
		
	
	
	
// $Id$ -*-c++-*-
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//***************************************************************************
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// File:
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//	InstrSelectionSupport.h
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// 
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// Purpose:
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//	Target-independent instruction selection code.
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//      See SparcInstrSelection.cpp for usage.
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//      
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// History:
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//	10/10/01	 -  Vikram Adve  -  Created
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//**************************************************************************/
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#include "llvm/CodeGen/InstrSelectionSupport.h"
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#include "llvm/CodeGen/InstrSelection.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstrAnnot.h"
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#include "llvm/CodeGen/MachineCodeForInstruction.h"
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#include "llvm/CodeGen/MachineCodeForMethod.h"
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#include "llvm/CodeGen/InstrForest.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/MachineRegInfo.h"
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#include "llvm/Constants.h"
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#include "llvm/Function.h"
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#include "llvm/BasicBlock.h"
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#include "llvm/Type.h"
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#include "llvm/iMemory.h"
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using std::vector;
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//*************************** Local Functions ******************************/
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// Generate code to load the constant into a TmpInstruction (virtual reg) and
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// returns the virtual register.
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// 
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static TmpInstruction*
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InsertCodeToLoadConstant(Function *F,
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                         Value* opValue,
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                         Instruction* vmInstr,
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                         vector<MachineInstr*>& loadConstVec,
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                         TargetMachine& target)
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{
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  vector<TmpInstruction*> tempVec;
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  // Create a tmp virtual register to hold the constant.
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  TmpInstruction* tmpReg = new TmpInstruction(opValue);
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  MachineCodeForInstruction &mcfi = MachineCodeForInstruction::get(vmInstr);
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  mcfi.addTemp(tmpReg);
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  target.getInstrInfo().CreateCodeToLoadConst(target, F, opValue, tmpReg,
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                                              loadConstVec, mcfi);
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  // Record the mapping from the tmp VM instruction to machine instruction.
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  // Do this for all machine instructions that were not mapped to any
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  // other temp values created by 
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  // tmpReg->addMachineInstruction(loadConstVec.back());
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  return tmpReg;
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}
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//---------------------------------------------------------------------------
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// Function GetConstantValueAsSignedInt
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// 
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// Convenience function to get the value of an integer constant, for an
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// appropriate integer or non-integer type that can be held in an integer.
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// The type of the argument must be the following:
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//      Signed or unsigned integer
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//      Boolean
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//      Pointer
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// 
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// isValidConstant is set to true if a valid constant was found.
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//---------------------------------------------------------------------------
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int64_t
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GetConstantValueAsSignedInt(const Value *V,
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                            bool &isValidConstant)
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{
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  if (!isa<Constant>(V))
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    {
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      isValidConstant = false;
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      return 0;
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    }
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  isValidConstant = true;
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  if (V->getType() == Type::BoolTy)
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    return (int64_t) cast<ConstantBool>(V)->getValue();
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  if (V->getType()->isIntegral())
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    {
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      if (V->getType()->isSigned())
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        return cast<ConstantSInt>(V)->getValue();
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      assert(V->getType()->isUnsigned());
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      uint64_t Val = cast<ConstantUInt>(V)->getValue();
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      if (Val < INT64_MAX)     // then safe to cast to signed
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        return (int64_t)Val;
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    }
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  isValidConstant = false;
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  return 0;
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}
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//---------------------------------------------------------------------------
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// Function: FoldGetElemChain
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// 
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// Purpose:
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//   Fold a chain of GetElementPtr instructions containing only
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//   constant offsets into an equivalent (Pointer, IndexVector) pair.
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//   Returns the pointer Value, and stores the resulting IndexVector
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//   in argument chainIdxVec.
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//---------------------------------------------------------------------------
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Value*
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FoldGetElemChain(const InstructionNode* getElemInstrNode,
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		 vector<Value*>& chainIdxVec)
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{
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  MemAccessInst* getElemInst = (MemAccessInst*)
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    getElemInstrNode->getInstruction();
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  // Return NULL if we don't fold any instructions in.
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  Value* ptrVal = NULL;
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  // Remember if the last instruction had a leading [0] index.
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  bool hasLeadingZero = false;
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  // Now chase the chain of getElementInstr instructions, if any.
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  // Check for any non-constant indices and stop there.
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  // 
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  const InstrTreeNode* ptrChild = getElemInstrNode;
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  while (ptrChild->getOpLabel() == Instruction::GetElementPtr ||
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	 ptrChild->getOpLabel() == GetElemPtrIdx)
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    {
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      // Child is a GetElemPtr instruction
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      getElemInst = (MemAccessInst*)
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	((InstructionNode*) ptrChild)->getInstruction();
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      const vector<Value*>& idxVec = getElemInst->copyIndices();
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      bool allConstantOffsets = true;
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      // Check for a leading [0] index, if any.  It will be discarded later.
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      ConstantUInt* CV = dyn_cast<ConstantUInt>(idxVec[0]);
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      hasLeadingZero = bool(CV && CV->getType() == Type::UIntTy &&
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                            (CV->getValue() == 0));
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      // Check that all offsets are constant for this instruction
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      for (unsigned int i=0; i < idxVec.size(); i++)
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        if (! isa<ConstantUInt>(idxVec[i]))
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          {
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            allConstantOffsets = false; 
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            break;
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          }
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      if (allConstantOffsets)
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        { // Get pointer value out of ptrChild.
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          ptrVal = getElemInst->getPointerOperand();
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          // Insert its index vector at the start.
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          chainIdxVec.insert(chainIdxVec.begin(),
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                             idxVec.begin() + (hasLeadingZero? 1:0),
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                             idxVec.end());
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          // Mark the folded node so no code is generated for it.
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          ((InstructionNode*) ptrChild)->markFoldedIntoParent();
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        }
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      else // cannot fold this getElementPtr instr. or any further ones
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        break;
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      ptrChild = ptrChild->leftChild();
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    }
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  // If the first getElementPtr instruction had a leading [0], add it back.
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  // Note that this instruction is the *last* one handled above.
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  if (hasLeadingZero) 
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    chainIdxVec.insert(chainIdxVec.begin(), ConstantUInt::get(Type::UIntTy,0));
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  return ptrVal;
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}
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//------------------------------------------------------------------------ 
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// Function Set2OperandsFromInstr
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// Function Set3OperandsFromInstr
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// 
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// For the common case of 2- and 3-operand arithmetic/logical instructions,
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// set the m/c instr. operands directly from the VM instruction's operands.
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// Check whether the first or second operand is 0 and can use a dedicated "0"
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// register.
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// Check whether the second operand should use an immediate field or register.
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// (First and third operands are never immediates for such instructions.)
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// 
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// Arguments:
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// canDiscardResult: Specifies that the result operand can be discarded
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//		     by using the dedicated "0"
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// 
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// op1position, op2position and resultPosition: Specify in which position
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//		     in the machine instruction the 3 operands (arg1, arg2
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//		     and result) should go.
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// 
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//------------------------------------------------------------------------ 
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void
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Set2OperandsFromInstr(MachineInstr* minstr,
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		      InstructionNode* vmInstrNode,
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		      const TargetMachine& target,
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		      bool canDiscardResult,
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		      int op1Position,
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		      int resultPosition)
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{
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  Set3OperandsFromInstr(minstr, vmInstrNode, target,
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			canDiscardResult, op1Position,
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			/*op2Position*/ -1, resultPosition);
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}
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void
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Set3OperandsFromInstr(MachineInstr* minstr,
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		      InstructionNode* vmInstrNode,
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		      const TargetMachine& target,
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		      bool canDiscardResult,
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		      int op1Position,
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		      int op2Position,
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		      int resultPosition)
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{
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  assert(op1Position >= 0);
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  assert(resultPosition >= 0);
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  // operand 1
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  minstr->SetMachineOperandVal(op1Position, MachineOperand::MO_VirtualRegister,
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			    vmInstrNode->leftChild()->getValue());   
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  // operand 2 (if any)
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  if (op2Position >= 0)
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    minstr->SetMachineOperandVal(op2Position, MachineOperand::MO_VirtualRegister,
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			      vmInstrNode->rightChild()->getValue());   
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  // result operand: if it can be discarded, use a dead register if one exists
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  if (canDiscardResult && target.getRegInfo().getZeroRegNum() >= 0)
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    minstr->SetMachineOperandReg(resultPosition,
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			      target.getRegInfo().getZeroRegNum());
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  else
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    minstr->SetMachineOperandVal(resultPosition,
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			      MachineOperand::MO_VirtualRegister, vmInstrNode->getValue());
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}
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MachineOperand::MachineOperandType
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ChooseRegOrImmed(Value* val,
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		 MachineOpCode opCode,
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		 const TargetMachine& target,
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		 bool canUseImmed,
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		 unsigned int& getMachineRegNum,
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		 int64_t& getImmedValue)
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{
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  MachineOperand::MachineOperandType opType =
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    MachineOperand::MO_VirtualRegister;
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  getMachineRegNum = 0;
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  getImmedValue = 0;
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  // Check for the common case first: argument is not constant
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  // 
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  Constant *CPV = dyn_cast<Constant>(val);
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  if (!CPV) return opType;
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  if (ConstantBool *CPB = dyn_cast<ConstantBool>(CPV))
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    {
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      if (!CPB->getValue() && target.getRegInfo().getZeroRegNum() >= 0)
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	{
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	  getMachineRegNum = target.getRegInfo().getZeroRegNum();
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	  return MachineOperand::MO_MachineRegister;
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	}
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      getImmedValue = 1;
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      return MachineOperand::MO_SignExtendedImmed;
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    }
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  // Otherwise it needs to be an integer or a NULL pointer
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  if (! CPV->getType()->isIntegral() &&
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      ! (isa<PointerType>(CPV->getType()) &&
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         CPV->isNullValue()))
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    return opType;
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  // Now get the constant value and check if it fits in the IMMED field.
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  // Take advantage of the fact that the max unsigned value will rarely
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  // fit into any IMMED field and ignore that case (i.e., cast smaller
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  // unsigned constants to signed).
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  // 
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  int64_t intValue;
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  if (isa<PointerType>(CPV->getType()))
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    {
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      intValue = 0;
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    }
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  else if (CPV->getType()->isSigned())
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    {
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      intValue = cast<ConstantSInt>(CPV)->getValue();
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    }
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  else
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    {
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      uint64_t V = cast<ConstantUInt>(CPV)->getValue();
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      if (V >= INT64_MAX) return opType;
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      intValue = (int64_t)V;
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    }
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  if (intValue == 0 && target.getRegInfo().getZeroRegNum() >= 0)
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    {
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      opType = MachineOperand::MO_MachineRegister;
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      getMachineRegNum = target.getRegInfo().getZeroRegNum();
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    }
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  else if (canUseImmed &&
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	   target.getInstrInfo().constantFitsInImmedField(opCode, intValue))
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    {
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      opType = CPV->getType()->isSigned()
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        ? MachineOperand::MO_SignExtendedImmed
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        : MachineOperand::MO_UnextendedImmed;
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      getImmedValue = intValue;
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    }
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  return opType;
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}
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//---------------------------------------------------------------------------
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// Function: FixConstantOperandsForInstr
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// 
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// Purpose:
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// Special handling for constant operands of a machine instruction
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// -- if the constant is 0, use the hardwired 0 register, if any;
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// -- if the constant fits in the IMMEDIATE field, use that field;
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// -- else create instructions to put the constant into a register, either
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//    directly or by loading explicitly from the constant pool.
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// 
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// In the first 2 cases, the operand of `minstr' is modified in place.
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// Returns a vector of machine instructions generated for operands that
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// fall under case 3; these must be inserted before `minstr'.
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//---------------------------------------------------------------------------
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vector<MachineInstr*>
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FixConstantOperandsForInstr(Instruction* vmInstr,
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                            MachineInstr* minstr,
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                            TargetMachine& target)
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{
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  vector<MachineInstr*> loadConstVec;
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  const MachineInstrDescriptor& instrDesc =
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    target.getInstrInfo().getDescriptor(minstr->getOpCode());
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  Function *F = vmInstr->getParent()->getParent();
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  for (unsigned op=0; op < minstr->getNumOperands(); op++)
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    {
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      const MachineOperand& mop = minstr->getOperand(op);
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      // skip the result position (for efficiency below) and any other
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      // positions already marked as not a virtual register
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      if (instrDesc.resultPos == (int) op || 
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          mop.getOperandType() != MachineOperand::MO_VirtualRegister ||
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          mop.getVRegValue() == NULL)
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        {
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          continue;
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        }
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      Value* opValue = mop.getVRegValue();
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      bool constantThatMustBeLoaded = false;
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      if (Constant *opConst = dyn_cast<Constant>(opValue))
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        {
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          unsigned int machineRegNum;
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          int64_t immedValue;
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          MachineOperand::MachineOperandType opType =
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            ChooseRegOrImmed(opValue, minstr->getOpCode(), target,
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                             (target.getInstrInfo().getImmedConstantPos(minstr->getOpCode()) == (int) op),
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                             machineRegNum, immedValue);
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          if (opType == MachineOperand::MO_MachineRegister)
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            minstr->SetMachineOperandReg(op, machineRegNum);
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          else if (opType == MachineOperand::MO_VirtualRegister)
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            constantThatMustBeLoaded = true; // load is generated below
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          else
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            minstr->SetMachineOperandConst(op, opType, immedValue);
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        }
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      if (constantThatMustBeLoaded || isa<GlobalValue>(opValue))
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        { // opValue is a constant that must be explicitly loaded into a reg.
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          TmpInstruction* tmpReg = InsertCodeToLoadConstant(F, opValue,vmInstr,
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                                                            loadConstVec,
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                                                            target);
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          minstr->SetMachineOperandVal(op, MachineOperand::MO_VirtualRegister,
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                                       tmpReg);
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        }
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    }
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  // 
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  // Also, check for implicit operands used by the machine instruction
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  // (no need to check those defined since they cannot be constants).
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  // These include:
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  // -- arguments to a Call
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  // -- return value of a Return
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  // Any such operand that is a constant value needs to be fixed also.
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  // The current instructions with implicit refs (viz., Call and Return)
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  // have no immediate fields, so the constant always needs to be loaded
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  // into a register.
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  // 
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  bool isCall = target.getInstrInfo().isCall(minstr->getOpCode());
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  unsigned lastCallArgNum = 0;          // unused if not a call
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  CallArgsDescriptor* argDesc = NULL;   // unused if not a call
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  if (isCall)
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    argDesc = CallArgsDescriptor::get(minstr);
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  for (unsigned i=0, N=minstr->getNumImplicitRefs(); i < N; ++i)
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    if (isa<Constant>(minstr->getImplicitRef(i)) ||
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        isa<GlobalValue>(minstr->getImplicitRef(i)))
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      {
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        Value* oldVal = minstr->getImplicitRef(i);
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        TmpInstruction* tmpReg =
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          InsertCodeToLoadConstant(F, oldVal, vmInstr, loadConstVec, target);
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        minstr->setImplicitRef(i, tmpReg);
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        if (isCall)
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          { // find and replace the argument in the CallArgsDescriptor
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            unsigned i=lastCallArgNum;
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            while (argDesc->getArgInfo(i).getArgVal() != oldVal)
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              ++i;
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            assert(i < argDesc->getNumArgs() &&
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                   "Constant operands to a call *must* be in the arg list");
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            lastCallArgNum = i;
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            argDesc->getArgInfo(i).replaceArgVal(tmpReg);
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          }
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      }
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  return loadConstVec;
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}
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