82 lines
		
	
	
		
			2.7 KiB
		
	
	
	
		
			TableGen
		
	
	
	
			
		
		
	
	
			82 lines
		
	
	
		
			2.7 KiB
		
	
	
	
		
			TableGen
		
	
	
	
| //===-- AVR.td - Describe the AVR Target Machine ----------*- tablegen -*-===//
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| //
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| //                     The LLVM Compiler Infrastructure
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| //
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| // This file is distributed under the University of Illinois Open Source
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| // License. See LICENSE.TXT for details.
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| //
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| //===---------------------------------------------------------------------===//
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| // This is the top level entry point for the AVR target.
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| //===---------------------------------------------------------------------===//
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| 
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| //===---------------------------------------------------------------------===//
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| // Target-independent interfaces which we are implementing
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| //===---------------------------------------------------------------------===//
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| 
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| include "llvm/Target/Target.td"
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| 
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| //===---------------------------------------------------------------------===//
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| // AVR Device Definitions
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| //===---------------------------------------------------------------------===//
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| 
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| include "AVRDevices.td"
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| 
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| //===---------------------------------------------------------------------===//
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| // Register File Description
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| //===---------------------------------------------------------------------===//
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| 
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| include "AVRRegisterInfo.td"
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| 
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| //===---------------------------------------------------------------------===//
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| // Instruction Descriptions
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| //===---------------------------------------------------------------------===//
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| 
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| include "AVRInstrInfo.td"
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| 
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| def AVRInstrInfo : InstrInfo;
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| 
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| //===---------------------------------------------------------------------===//
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| // Calling Conventions
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| //===---------------------------------------------------------------------===//
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| 
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| include "AVRCallingConv.td"
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| 
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| //===---------------------------------------------------------------------===//
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| // Assembly Printers
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| //===---------------------------------------------------------------------===//
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| 
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| def AVRAsmWriter : AsmWriter {
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|  string AsmWriterClassName = "InstPrinter";
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|  bit isMCAsmWriter = 1;
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| }
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| 
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| //===---------------------------------------------------------------------===//
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| // Assembly Parsers
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| //===---------------------------------------------------------------------===//
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| 
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| def AVRAsmParser : AsmParser {
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|   let ShouldEmitMatchRegisterName = 1;
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|   let ShouldEmitMatchRegisterAltName = 1;
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| }
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| 
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| def AVRAsmParserVariant : AsmParserVariant {
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|   int Variant = 0;
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| 
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|   // Recognize hard coded registers.
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|   string RegisterPrefix = "$";
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|   string TokenizingCharacters = "+";
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| }
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| 
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| //===---------------------------------------------------------------------===//
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| // Target Declaration
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| //===---------------------------------------------------------------------===//
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| 
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| def AVR : Target {
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|   let InstructionSet         = AVRInstrInfo;
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|   let AssemblyWriters        = [AVRAsmWriter];
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| 
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|   let AssemblyParsers        = [AVRAsmParser];
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|   let AssemblyParserVariants = [AVRAsmParserVariant];
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| }
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| 
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