149 lines
		
	
	
		
			3.5 KiB
		
	
	
	
		
			C++
		
	
	
	
			
		
		
	
	
			149 lines
		
	
	
		
			3.5 KiB
		
	
	
	
		
			C++
		
	
	
	
| //===-- LanaiAluCode.h - ALU operator encoding ----------------------------===//
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| //
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| //                     The LLVM Compiler Infrastructure
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| //
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| // This file is distributed under the University of Illinois Open Source
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| // License. See LICENSE.TXT for details.
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| //
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| //===----------------------------------------------------------------------===//
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| //
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| // The encoding for ALU operators used in RM and RRM operands
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| //
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| //===----------------------------------------------------------------------===//
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| 
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| #ifndef LLVM_LIB_TARGET_LANAI_LANAIALUCODE_H
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| #define LLVM_LIB_TARGET_LANAI_LANAIALUCODE_H
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| 
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| #include "llvm/ADT/StringSwitch.h"
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| #include "llvm/CodeGen/ISDOpcodes.h"
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| #include "llvm/Support/ErrorHandling.h"
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| 
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| namespace llvm {
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| namespace LPAC {
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| enum AluCode {
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|   ADD = 0x00,
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|   ADDC = 0x01,
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|   SUB = 0x02,
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|   SUBB = 0x03,
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|   AND = 0x04,
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|   OR = 0x05,
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|   XOR = 0x06,
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|   SPECIAL = 0x07,
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| 
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|   // Shift instructions are treated as SPECIAL when encoding the machine
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|   // instruction, but kept distinct until lowering. The constant values are
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|   // chosen to ease lowering.
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|   SHL = 0x17,
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|   SRL = 0x27,
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|   SRA = 0x37,
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| 
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|   // Indicates an unknown/unsupported operator
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|   UNKNOWN = 0xFF,
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| };
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| 
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| // Bits indicating post- and pre-operators should be tested and set using Is*
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| // and Make* utility functions
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| const int Lanai_PRE_OP = 0x40;
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| const int Lanai_POST_OP = 0x80;
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| 
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| inline static unsigned encodeLanaiAluCode(unsigned AluOp) {
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|   unsigned const OP_ENCODING_MASK = 0x07;
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|   return AluOp & OP_ENCODING_MASK;
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| }
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| 
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| inline static unsigned getAluOp(unsigned AluOp) {
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|   unsigned const ALU_MASK = 0x3F;
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|   return AluOp & ALU_MASK;
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| }
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| 
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| inline static bool isPreOp(unsigned AluOp) { return AluOp & Lanai_PRE_OP; }
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| 
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| inline static bool isPostOp(unsigned AluOp) { return AluOp & Lanai_POST_OP; }
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| 
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| inline static unsigned makePreOp(unsigned AluOp) {
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|   assert(!isPostOp(AluOp) && "Operator can't be a post- and pre-op");
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|   return AluOp | Lanai_PRE_OP;
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| }
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| 
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| inline static unsigned makePostOp(unsigned AluOp) {
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|   assert(!isPreOp(AluOp) && "Operator can't be a post- and pre-op");
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|   return AluOp | Lanai_POST_OP;
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| }
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| 
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| inline static bool modifiesOp(unsigned AluOp) {
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|   return isPreOp(AluOp) | isPostOp(AluOp);
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| }
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| 
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| inline static const char *lanaiAluCodeToString(unsigned AluOp) {
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|   switch (getAluOp(AluOp)) {
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|   case ADD:
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|     return "add";
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|   case ADDC:
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|     return "addc";
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|   case SUB:
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|     return "sub";
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|   case SUBB:
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|     return "subb";
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|   case AND:
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|     return "and";
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|   case OR:
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|     return "or";
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|   case XOR:
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|     return "xor";
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|   case SHL:
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|     return "sh";
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|   case SRL:
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|     return "sh";
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|   case SRA:
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|     return "sha";
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|   default:
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|     llvm_unreachable("Invalid ALU code.");
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|   }
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| }
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| 
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| inline static AluCode stringToLanaiAluCode(StringRef S) {
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|   return StringSwitch<AluCode>(S)
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|       .Case("add", ADD)
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|       .Case("addc", ADDC)
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|       .Case("sub", SUB)
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|       .Case("subb", SUBB)
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|       .Case("and", AND)
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|       .Case("or", OR)
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|       .Case("xor", XOR)
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|       .Case("sh", SHL)
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|       .Case("srl", SRL)
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|       .Case("sha", SRA)
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|       .Default(UNKNOWN);
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| }
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| 
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| inline static AluCode isdToLanaiAluCode(ISD::NodeType Node_type) {
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|   switch (Node_type) {
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|   case ISD::ADD:
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|     return AluCode::ADD;
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|   case ISD::ADDE:
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|     return AluCode::ADDC;
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|   case ISD::SUB:
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|     return AluCode::SUB;
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|   case ISD::SUBE:
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|     return AluCode::SUBB;
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|   case ISD::AND:
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|     return AluCode::AND;
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|   case ISD::OR:
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|     return AluCode::OR;
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|   case ISD::XOR:
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|     return AluCode::XOR;
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|   case ISD::SHL:
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|     return AluCode::SHL;
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|   case ISD::SRL:
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|     return AluCode::SRL;
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|   case ISD::SRA:
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|     return AluCode::SRA;
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|   default:
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|     return AluCode::UNKNOWN;
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|   }
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| }
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| } // namespace LPAC
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| } // namespace llvm
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| 
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| #endif // LLVM_LIB_TARGET_LANAI_LANAIALUCODE_H
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