100 lines
3.0 KiB
C++
100 lines
3.0 KiB
C++
//===- MipsLegalizerInfo.cpp ------------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file implements the targeting of the Machinelegalizer class for Mips.
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/// \todo This should be generated by TableGen.
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//===----------------------------------------------------------------------===//
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#include "MipsLegalizerInfo.h"
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#include "MipsTargetMachine.h"
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#include "llvm/CodeGen/GlobalISel/LegalizerHelper.h"
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using namespace llvm;
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MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) {
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using namespace TargetOpcode;
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const LLT s32 = LLT::scalar(32);
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const LLT s64 = LLT::scalar(64);
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const LLT p0 = LLT::pointer(0, 32);
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getActionDefinitionsBuilder(G_ADD)
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.legalFor({s32})
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.minScalar(0, s32)
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.customFor({s64});
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getActionDefinitionsBuilder({G_LOAD, G_STORE})
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.legalForCartesianProduct({p0, s32}, {p0});
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getActionDefinitionsBuilder({G_AND, G_OR, G_XOR, G_SHL, G_ASHR, G_LSHR})
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.legalFor({s32});
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getActionDefinitionsBuilder(G_ICMP)
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.legalFor({{s32, s32}})
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.minScalar(0, s32);
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getActionDefinitionsBuilder(G_CONSTANT)
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.legalFor({s32});
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getActionDefinitionsBuilder(G_GEP)
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.legalFor({{p0, s32}});
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getActionDefinitionsBuilder(G_FRAME_INDEX)
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.legalFor({p0});
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getActionDefinitionsBuilder(G_GLOBAL_VALUE)
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.legalFor({p0});
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computeTables();
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verify(*ST.getInstrInfo());
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}
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bool MipsLegalizerInfo::legalizeCustom(MachineInstr &MI,
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MachineRegisterInfo &MRI,
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MachineIRBuilder &MIRBuilder) const {
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using namespace TargetOpcode;
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MIRBuilder.setInstr(MI);
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switch (MI.getOpcode()) {
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case G_ADD: {
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unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits();
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const LLT sHalf = LLT::scalar(Size / 2);
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unsigned RHSLow = MRI.createGenericVirtualRegister(sHalf);
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unsigned RHSHigh = MRI.createGenericVirtualRegister(sHalf);
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unsigned LHSLow = MRI.createGenericVirtualRegister(sHalf);
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unsigned LHSHigh = MRI.createGenericVirtualRegister(sHalf);
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unsigned ResLow = MRI.createGenericVirtualRegister(sHalf);
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unsigned ResHigh = MRI.createGenericVirtualRegister(sHalf);
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unsigned Carry = MRI.createGenericVirtualRegister(sHalf);
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unsigned TmpResHigh = MRI.createGenericVirtualRegister(sHalf);
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MIRBuilder.buildUnmerge({RHSHigh, RHSLow}, MI.getOperand(2).getReg());
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MIRBuilder.buildUnmerge({LHSHigh, LHSLow}, MI.getOperand(1).getReg());
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MIRBuilder.buildAdd(TmpResHigh, LHSHigh, RHSHigh);
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MIRBuilder.buildAdd(ResLow, LHSLow, RHSLow);
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MIRBuilder.buildICmp(CmpInst::ICMP_ULT, Carry, ResLow, LHSLow);
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MIRBuilder.buildAdd(ResHigh, TmpResHigh, Carry);
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MIRBuilder.buildMerge(MI.getOperand(0).getReg(), {ResHigh, ResLow});
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MI.eraseFromParent();
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break;
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}
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default:
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return false;
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}
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return true;
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}
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