51 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			51 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			LLVM
		
	
	
	
| ; RUN: llc -O3 -aarch64-enable-gep-opt=true  -print-after=codegenprepare -mcpu=cortex-a53 < %s >%t 2>&1 && FileCheck <%t %s
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| ; REQUIRES: asserts
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| target triple = "aarch64--linux-android"
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| 
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| %typeD = type { i32, i32, [256 x i32], [257 x i32] }
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| 
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| ; Function Attrs: noreturn nounwind uwtable
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| define i32 @test1(%typeD* nocapture %s) {
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| entry:
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| ; CHECK-LABEL: entry:
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| ; CHECK:    %uglygep = getelementptr i8, i8* %0, i64 1032
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| ; CHECK:    br label %do.body.i
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| 
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| 
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|   %tPos = getelementptr inbounds %typeD, %typeD* %s, i64 0, i32 0
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|   %k0 = getelementptr inbounds %typeD, %typeD* %s, i64 0, i32 1
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|   %.pre = load i32, i32* %tPos, align 4
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|   br label %do.body.i
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| 
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| do.body.i:
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| ; CHECK-LABEL: do.body.i:
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| ; CHECK:          %uglygep2 = getelementptr i8, i8* %uglygep, i64 %3
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| ; CHECK-NEXT:     %4 = bitcast i8* %uglygep2 to i32*
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| ; CHECK-NOT:      %uglygep2 = getelementptr i8, i8* %uglygep, i64 1032
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| 
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| 
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|   %0 = phi i32 [ 256, %entry ], [ %.be, %do.body.i.backedge ]
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|   %1 = phi i32 [ 0, %entry ], [ %.be6, %do.body.i.backedge ]
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|   %add.i = add nsw i32 %1, %0
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|   %shr.i = ashr i32 %add.i, 1
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|   %idxprom.i = sext i32 %shr.i to i64
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|   %arrayidx.i = getelementptr inbounds %typeD, %typeD* %s, i64 0, i32 3, i64 %idxprom.i
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|   %2 = load i32, i32* %arrayidx.i, align 4
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|   %cmp.i = icmp sle i32 %2, %.pre
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|   %na.1.i = select i1 %cmp.i, i32 %0, i32 %shr.i
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|   %nb.1.i = select i1 %cmp.i, i32 %shr.i, i32 %1
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|   %sub.i = sub nsw i32 %na.1.i, %nb.1.i
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|   %cmp1.i = icmp eq i32 %sub.i, 1
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|   br i1 %cmp1.i, label %fooo.exit, label %do.body.i.backedge
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| 
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| do.body.i.backedge:
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|   %.be = phi i32 [ %na.1.i, %do.body.i ], [ 256, %fooo.exit ]
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|   %.be6 = phi i32 [ %nb.1.i, %do.body.i ], [ 0, %fooo.exit ]
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|   br label %do.body.i
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| 
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| fooo.exit:                              ; preds = %do.body.i
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|   store i32 %nb.1.i, i32* %k0, align 4
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|   br label %do.body.i.backedge
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| }
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| 
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