205 lines
		
	
	
		
			5.4 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			205 lines
		
	
	
		
			5.4 KiB
		
	
	
	
		
			LLVM
		
	
	
	
| ; RUN: llc < %s -mtriple=arm64-eabi -mcpu=cyclone -aarch64-neon-syntax=apple | FileCheck %s
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| ; rdar://10263824
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| 
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| define i1 @fcmp_float1(float %a) nounwind ssp {
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| entry:
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| ; CHECK-LABEL: @fcmp_float1
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| ; CHECK: fcmp s0, #0.0
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| ; CHECK: cset w0, ne
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|   %cmp = fcmp une float %a, 0.000000e+00
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|   ret i1 %cmp
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| }
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| 
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| define i1 @fcmp_float2(float %a, float %b) nounwind ssp {
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| entry:
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| ; CHECK-LABEL: @fcmp_float2
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| ; CHECK: fcmp s0, s1
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| ; CHECK: cset w0, ne
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|   %cmp = fcmp une float %a, %b
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|   ret i1 %cmp
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| }
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| 
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| define i1 @fcmp_double1(double %a) nounwind ssp {
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| entry:
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| ; CHECK-LABEL: @fcmp_double1
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| ; CHECK: fcmp d0, #0.0
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| ; CHECK: cset w0, ne
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|   %cmp = fcmp une double %a, 0.000000e+00
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|   ret i1 %cmp
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| }
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| 
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| define i1 @fcmp_double2(double %a, double %b) nounwind ssp {
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| entry:
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| ; CHECK-LABEL: @fcmp_double2
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| ; CHECK: fcmp d0, d1
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| ; CHECK: cset w0, ne
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|   %cmp = fcmp une double %a, %b
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|   ret i1 %cmp
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| }
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| 
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| ; Check each fcmp condition
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| define float @fcmp_oeq(float %a, float %b) nounwind ssp {
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| ; CHECK-LABEL: @fcmp_oeq
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| ; CHECK: fcmp s0, s1
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| ; CHECK-DAG: fmov s[[ZERO:[0-9]+]], wzr
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| ; CHECK-DAG: fmov s[[ONE:[0-9]+]], #1.0
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| ; CHECK: fcsel s0, s[[ONE]], s[[ZERO]], eq
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| 
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|   %cmp = fcmp oeq float %a, %b
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|   %conv = uitofp i1 %cmp to float
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|   ret float %conv
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| }
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| 
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| define float @fcmp_ogt(float %a, float %b) nounwind ssp {
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| ; CHECK-LABEL: @fcmp_ogt
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| ; CHECK: fcmp s0, s1
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| ; CHECK-DAG: fmov s[[ZERO:[0-9]+]], wzr
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| ; CHECK-DAG: fmov s[[ONE:[0-9]+]], #1.0
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| ; CHECK: fcsel s0, s[[ONE]], s[[ZERO]], gt
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| 
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|   %cmp = fcmp ogt float %a, %b
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|   %conv = uitofp i1 %cmp to float
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|   ret float %conv
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| }
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| 
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| define float @fcmp_oge(float %a, float %b) nounwind ssp {
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| ; CHECK-LABEL: @fcmp_oge
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| ; CHECK: fcmp s0, s1
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| ; CHECK-DAG: fmov s[[ZERO:[0-9]+]], wzr
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| ; CHECK-DAG: fmov s[[ONE:[0-9]+]], #1.0
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| ; CHECK: fcsel s0, s[[ONE]], s[[ZERO]], ge
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| 
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|   %cmp = fcmp oge float %a, %b
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|   %conv = uitofp i1 %cmp to float
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|   ret float %conv
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| }
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| 
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| define float @fcmp_olt(float %a, float %b) nounwind ssp {
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| ; CHECK-LABEL: @fcmp_olt
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| ; CHECK: fcmp s0, s1
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| ; CHECK-DAG: fmov s[[ZERO:[0-9]+]], wzr
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| ; CHECK-DAG: fmov s[[ONE:[0-9]+]], #1.0
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| ; CHECK: fcsel s0, s[[ONE]], s[[ZERO]], mi
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| 
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|   %cmp = fcmp olt float %a, %b
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|   %conv = uitofp i1 %cmp to float
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|   ret float %conv
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| }
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| 
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| define float @fcmp_ole(float %a, float %b) nounwind ssp {
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| ; CHECK-LABEL: @fcmp_ole
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| ; CHECK: fcmp s0, s1
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| ; CHECK-DAG: fmov s[[ZERO:[0-9]+]], wzr
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| ; CHECK-DAG: fmov s[[ONE:[0-9]+]], #1.0
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| ; CHECK: fcsel s0, s[[ONE]], s[[ZERO]], ls
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| 
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|   %cmp = fcmp ole float %a, %b
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|   %conv = uitofp i1 %cmp to float
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|   ret float %conv
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| }
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| 
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| define float @fcmp_ord(float %a, float %b) nounwind ssp {
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| ; CHECK-LABEL: @fcmp_ord
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| ; CHECK: fcmp s0, s1
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| ; CHECK-DAG: fmov s[[ZERO:[0-9]+]], wzr
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| ; CHECK-DAG: fmov s[[ONE:[0-9]+]], #1.0
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| ; CHECK: fcsel s0, s[[ONE]], s[[ZERO]], vc
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|   %cmp = fcmp ord float %a, %b
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|   %conv = uitofp i1 %cmp to float
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|   ret float %conv
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| }
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| 
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| define float @fcmp_uno(float %a, float %b) nounwind ssp {
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| ; CHECK-LABEL: @fcmp_uno
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| ; CHECK: fcmp s0, s1
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| ; CHECK-DAG: fmov s[[ZERO:[0-9]+]], wzr
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| ; CHECK-DAG: fmov s[[ONE:[0-9]+]], #1.0
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| ; CHECK: fcsel s0, s[[ONE]], s[[ZERO]], vs
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|   %cmp = fcmp uno float %a, %b
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|   %conv = uitofp i1 %cmp to float
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|   ret float %conv
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| }
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| 
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| define float @fcmp_ugt(float %a, float %b) nounwind ssp {
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| ; CHECK-LABEL: @fcmp_ugt
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| ; CHECK: fcmp s0, s1
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| ; CHECK-DAG: fmov s[[ZERO:[0-9]+]], wzr
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| ; CHECK-DAG: fmov s[[ONE:[0-9]+]], #1.0
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| ; CHECK: fcsel s0, s[[ONE]], s[[ZERO]], hi
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|   %cmp = fcmp ugt float %a, %b
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|   %conv = uitofp i1 %cmp to float
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|   ret float %conv
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| }
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| 
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| define float @fcmp_uge(float %a, float %b) nounwind ssp {
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| ; CHECK-LABEL: @fcmp_uge
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| ; CHECK: fcmp s0, s1
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| ; CHECK-DAG: fmov s[[ZERO:[0-9]+]], wzr
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| ; CHECK-DAG: fmov s[[ONE:[0-9]+]], #1.0
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| ; CHECK: fcsel s0, s[[ONE]], s[[ZERO]], pl
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|   %cmp = fcmp uge float %a, %b
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|   %conv = uitofp i1 %cmp to float
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|   ret float %conv
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| }
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| 
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| define float @fcmp_ult(float %a, float %b) nounwind ssp {
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| ; CHECK-LABEL: @fcmp_ult
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| ; CHECK: fcmp s0, s1
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| ; CHECK-DAG: fmov s[[ZERO:[0-9]+]], wzr
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| ; CHECK-DAG: fmov s[[ONE:[0-9]+]], #1.0
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| ; CHECK: fcsel s0, s[[ONE]], s[[ZERO]], lt
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|   %cmp = fcmp ult float %a, %b
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|   %conv = uitofp i1 %cmp to float
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|   ret float %conv
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| }
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| 
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| define float @fcmp_ule(float %a, float %b) nounwind ssp {
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| ; CHECK-LABEL: @fcmp_ule
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| ; CHECK: fcmp s0, s1
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| ; CHECK-DAG: fmov s[[ZERO:[0-9]+]], wzr
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| ; CHECK-DAG: fmov s[[ONE:[0-9]+]], #1.0
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| ; CHECK: fcsel s0, s[[ONE]], s[[ZERO]], le
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|   %cmp = fcmp ule float %a, %b
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|   %conv = uitofp i1 %cmp to float
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|   ret float %conv
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| }
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| 
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| define float @fcmp_une(float %a, float %b) nounwind ssp {
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| ; CHECK-LABEL: @fcmp_une
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| ; CHECK: fcmp s0, s1
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| ; CHECK-DAG: fmov s[[ZERO:[0-9]+]], wzr
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| ; CHECK-DAG: fmov s[[ONE:[0-9]+]], #1.0
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| ; CHECK: fcsel s0, s[[ONE]], s[[ZERO]], ne
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|   %cmp = fcmp une float %a, %b
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|   %conv = uitofp i1 %cmp to float
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|   ret float %conv
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| }
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| 
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| ; Possible opportunity for improvement.  See comment in
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| ; ARM64TargetLowering::LowerSETCC()
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| define float @fcmp_one(float %a, float %b) nounwind ssp {
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| ; CHECK-LABEL: @fcmp_one
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| ;	fcmp	s0, s1
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| ; CHECK-DAG: fmov s[[ZERO:[0-9]+]], wzr
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| ; CHECK-DAG: fmov s[[ONE:[0-9]+]], #1.0
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| ; CHECK: fcsel [[TMP:s[0-9]+]], s[[ONE]], s[[ZERO]], mi
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| ; CHECK: fcsel s0, s[[ONE]], [[TMP]], gt
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|   %cmp = fcmp one float %a, %b
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|   %conv = uitofp i1 %cmp to float
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|   ret float %conv
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| }
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| 
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| ; Possible opportunity for improvement.  See comment in
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| ; ARM64TargetLowering::LowerSETCC()
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| define float @fcmp_ueq(float %a, float %b) nounwind ssp {
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| ; CHECK-LABEL: @fcmp_ueq
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| ; CHECK: fcmp s0, s1
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| ; CHECK-DAG: fmov s[[ZERO:[0-9]+]], wzr
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| ; CHECK-DAG: fmov s[[ONE:[0-9]+]], #1.0
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| ; CHECK: fcsel [[TMP:s[0-9]+]], s[[ONE]], s[[ZERO]], eq
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| ; CHECK: fcsel s0, s[[ONE]], [[TMP]], vs
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|   %cmp = fcmp ueq float %a, %b
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|   %conv = uitofp i1 %cmp to float
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|   ret float %conv
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| }
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