43 lines
1.5 KiB
LLVM
43 lines
1.5 KiB
LLVM
; RUN: llc -o - %s | FileCheck %s
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; Check that selection dag legalization of fcopysign works in cases with
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; different modes for the arguments.
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target triple = "aarch64--"
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declare fp128 @llvm.copysign.f128(fp128, fp128)
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@val_float = global float zeroinitializer, align 4
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@val_double = global double zeroinitializer, align 8
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@val_fp128 = global fp128 zeroinitializer, align 16
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; CHECK-LABEL: copysign0
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; CHECK: ldr [[REG:x[0-9]+]], [x8, :lo12:val_double]
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; CHECK: and [[ANDREG:x[0-9]+]], [[REG]], #0x8000000000000000
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; CHECK: lsr x[[LSRREGNUM:[0-9]+]], [[ANDREG]], #56
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; CHECK: bfxil w[[LSRREGNUM]], w{{[0-9]+}}, #0, #7
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; CHECK: strb w[[LSRREGNUM]],
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; CHECK: ldr q{{[0-9]+}},
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define fp128 @copysign0() {
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entry:
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%v = load double, double* @val_double, align 8
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%conv = fpext double %v to fp128
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%call = tail call fp128 @llvm.copysign.f128(fp128 0xL00000000000000007FFF000000000000, fp128 %conv) #2
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ret fp128 %call
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}
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; CHECK-LABEL: copysign1
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; CHECK-DAG: ldr [[REG:q[0-9]+]], [x8, :lo12:val_fp128]
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; CHECK-DAG: ldr [[REG:w[0-9]+]], [x8, :lo12:val_float]
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; CHECK: and [[ANDREG:w[0-9]+]], [[REG]], #0x80000000
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; CHECK: lsr w[[LSRREGNUM:[0-9]+]], [[ANDREG]], #24
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; CHECK: bfxil w[[LSRREGNUM]], w{{[0-9]+}}, #0, #7
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; CHECK: strb w[[LSRREGNUM]],
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; CHECK: ldr q{{[0-9]+}},
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define fp128@copysign1() {
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entry:
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%v0 = load fp128, fp128* @val_fp128, align 16
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%v1 = load float, float* @val_float, align 4
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%conv = fpext float %v1 to fp128
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%call = tail call fp128 @llvm.copysign.f128(fp128 %v0, fp128 %conv)
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ret fp128 %call
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}
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