99 lines
2.8 KiB
LLVM
99 lines
2.8 KiB
LLVM
; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple=aarch64-apple-darwin < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple=aarch64-apple-darwin -mcpu=cortex-a53 -enable-misched=false < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -enable-machine-outliner -enable-linkonceodr-outlining -mtriple=aarch64-apple-darwin < %s | FileCheck %s -check-prefix=ODR
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define linkonce_odr void @fish() #0 {
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; CHECK-LABEL: _fish:
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; CHECK-NOT: OUTLINED
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; ODR: [[OUTLINED:OUTLINED_FUNCTION_[0-9]+]]
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%1 = alloca i32, align 4
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%2 = alloca i32, align 4
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%3 = alloca i32, align 4
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%4 = alloca i32, align 4
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%5 = alloca i32, align 4
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%6 = alloca i32, align 4
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store i32 1, i32* %1, align 4
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store i32 2, i32* %2, align 4
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store i32 3, i32* %3, align 4
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store i32 4, i32* %4, align 4
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store i32 5, i32* %5, align 4
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store i32 6, i32* %6, align 4
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ret void
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}
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define void @turtle() section "TURTLE,turtle" {
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; CHECK-LABEL: _turtle:
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; ODR-LABEL: _turtle:
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; CHECK-NOT: OUTLINED
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%1 = alloca i32, align 4
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%2 = alloca i32, align 4
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%3 = alloca i32, align 4
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%4 = alloca i32, align 4
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%5 = alloca i32, align 4
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%6 = alloca i32, align 4
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store i32 1, i32* %1, align 4
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store i32 2, i32* %2, align 4
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store i32 3, i32* %3, align 4
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store i32 4, i32* %4, align 4
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store i32 5, i32* %5, align 4
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store i32 6, i32* %6, align 4
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ret void
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}
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define void @cat() #0 {
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; CHECK-LABEL: _cat:
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; CHECK: [[OUTLINED:OUTLINED_FUNCTION_[0-9]+]]
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; ODR: [[OUTLINED]]
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%1 = alloca i32, align 4
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%2 = alloca i32, align 4
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%3 = alloca i32, align 4
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%4 = alloca i32, align 4
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%5 = alloca i32, align 4
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%6 = alloca i32, align 4
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store i32 1, i32* %1, align 4
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store i32 2, i32* %2, align 4
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store i32 3, i32* %3, align 4
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store i32 4, i32* %4, align 4
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store i32 5, i32* %5, align 4
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store i32 6, i32* %6, align 4
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ret void
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}
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define void @dog() #0 {
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; CHECK-LABEL: _dog:
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; CHECK: [[OUTLINED]]
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; ODR: [[OUTLINED]]
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%1 = alloca i32, align 4
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%2 = alloca i32, align 4
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%3 = alloca i32, align 4
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%4 = alloca i32, align 4
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%5 = alloca i32, align 4
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%6 = alloca i32, align 4
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store i32 1, i32* %1, align 4
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store i32 2, i32* %2, align 4
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store i32 3, i32* %3, align 4
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store i32 4, i32* %4, align 4
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store i32 5, i32* %5, align 4
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store i32 6, i32* %6, align 4
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ret void
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}
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; ODR: [[OUTLINED]]:
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; CHECK: .p2align 2
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; CHECK-NEXT: [[OUTLINED]]:
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; CHECK: orr w8, wzr, #0x1
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; CHECK-NEXT: str w8, [sp, #28]
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; CHECK-NEXT: orr w8, wzr, #0x2
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; CHECK-NEXT: str w8, [sp, #24]
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; CHECK-NEXT: orr w8, wzr, #0x3
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; CHECK-NEXT: str w8, [sp, #20]
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; CHECK-NEXT: orr w8, wzr, #0x4
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; CHECK-NEXT: str w8, [sp, #16]
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; CHECK-NEXT: mov w8, #5
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; CHECK-NEXT: str w8, [sp, #12]
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; CHECK-NEXT: orr w8, wzr, #0x6
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; CHECK-NEXT: str w8, [sp, #8]
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; CHECK-NEXT: ret
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attributes #0 = { noredzone "target-cpu"="cyclone" }
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