48 lines
1.3 KiB
LLVM
48 lines
1.3 KiB
LLVM
; RUN: llc < %s -mtriple=aarch64-apple-darwin | FileCheck %s
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps
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; CHECK-NEXT: __LLVM_StackMaps:
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; Header
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; CHECK-NEXT: .byte 3
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 0
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; Num Functions
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; CHECK-NEXT: .long 1
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; Num LargeConstants
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; CHECK-NEXT: .long 0
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; Num Callsites
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; CHECK-NEXT: .long 1
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; Functions and stack size
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; CHECK-NEXT: .quad _stackmap_liveness
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; CHECK-NEXT: .quad 16
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; Test that the return register is recognized as an live-out.
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define i64 @stackmap_liveness(i1 %c) {
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; CHECK-LABEL: .long L{{.*}}-_stackmap_liveness
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 0
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; Padding
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; CHECK-NEXT: .p2align 3
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; CHECK-NEXT: .short 0
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; Num LiveOut Entries: 1
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; CHECK-NEXT: .short 2
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; LiveOut Entry 0: X0
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .byte 8
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; LiveOut Entry 1: SP
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; CHECK-NEXT: .short 31
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .byte 8
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; Align
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; CHECK-NEXT: .p2align 3
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%1 = select i1 %c, i64 1, i64 2
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call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 1, i32 32, i8* null, i32 0)
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ret i64 %1
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}
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declare void @llvm.experimental.patchpoint.void(i64, i32, i8*, i32, ...)
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