150 lines
7.9 KiB
LLVM
150 lines
7.9 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI -check-prefix=VIPLUS %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 -check-prefix=VIPLUS %s
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; FIXME: Need to handle non-uniform case for function below (load without gep).
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; GCN-LABEL: {{^}}v_test_imax_sge_i16:
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; VIPLUS: v_max_i16_e32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @v_test_imax_sge_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %aptr, i16 addrspace(1)* %bptr) nounwind {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep0 = getelementptr i16, i16 addrspace(1)* %aptr, i32 %tid
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%gep1 = getelementptr i16, i16 addrspace(1)* %bptr, i32 %tid
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%outgep = getelementptr i16, i16 addrspace(1)* %out, i32 %tid
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%a = load i16, i16 addrspace(1)* %gep0, align 4
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%b = load i16, i16 addrspace(1)* %gep1, align 4
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%cmp = icmp sge i16 %a, %b
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%val = select i1 %cmp, i16 %a, i16 %b
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store i16 %val, i16 addrspace(1)* %outgep, align 4
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ret void
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}
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; FIXME: Need to handle non-uniform case for function below (load without gep).
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; GCN-LABEL: {{^}}v_test_imax_sge_v2i16:
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; VI: v_max_i16_e32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
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; VI: v_max_i16_sdwa v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
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; GFX9: v_pk_max_i16 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @v_test_imax_sge_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %aptr, <2 x i16> addrspace(1)* %bptr) nounwind {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep0 = getelementptr <2 x i16>, <2 x i16> addrspace(1)* %aptr, i32 %tid
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%gep1 = getelementptr <2 x i16>, <2 x i16> addrspace(1)* %bptr, i32 %tid
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%outgep = getelementptr <2 x i16>, <2 x i16> addrspace(1)* %out, i32 %tid
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%a = load <2 x i16>, <2 x i16> addrspace(1)* %gep0, align 4
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%b = load <2 x i16>, <2 x i16> addrspace(1)* %gep1, align 4
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%cmp = icmp sge <2 x i16> %a, %b
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%val = select <2 x i1> %cmp, <2 x i16> %a, <2 x i16> %b
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store <2 x i16> %val, <2 x i16> addrspace(1)* %outgep, align 4
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ret void
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}
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; FIXME: Need to handle non-uniform case for function below (load without gep).
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; GCN-LABEL: {{^}}v_test_imax_sge_v3i16:
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; VI: v_max_i16_e32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
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; VI: v_max_i16_sdwa v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
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; VI: v_max_i16_e32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
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; VI-NOT: v_max_i16
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; GFX9: v_pk_max_i16 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
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; GFX9: v_pk_max_i16 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @v_test_imax_sge_v3i16(<3 x i16> addrspace(1)* %out, <3 x i16> addrspace(1)* %aptr, <3 x i16> addrspace(1)* %bptr) nounwind {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep0 = getelementptr <3 x i16>, <3 x i16> addrspace(1)* %aptr, i32 %tid
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%gep1 = getelementptr <3 x i16>, <3 x i16> addrspace(1)* %bptr, i32 %tid
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%outgep = getelementptr <3 x i16>, <3 x i16> addrspace(1)* %out, i32 %tid
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%a = load <3 x i16>, <3 x i16> addrspace(1)* %gep0, align 4
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%b = load <3 x i16>, <3 x i16> addrspace(1)* %gep1, align 4
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%cmp = icmp sge <3 x i16> %a, %b
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%val = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b
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store <3 x i16> %val, <3 x i16> addrspace(1)* %outgep, align 4
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ret void
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}
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; FIXME: Need to handle non-uniform case for function below (load without gep).
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; GCN-LABEL: {{^}}v_test_imax_sge_v4i16:
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; VI: v_max_i16_e32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
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; VI: v_max_i16_sdwa v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
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; VI: v_max_i16_e32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
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; VI: v_max_i16_sdwa v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
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; GFX9: v_pk_max_i16 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
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; GFX9: v_pk_max_i16 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @v_test_imax_sge_v4i16(<4 x i16> addrspace(1)* %out, <4 x i16> addrspace(1)* %aptr, <4 x i16> addrspace(1)* %bptr) nounwind {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep0 = getelementptr <4 x i16>, <4 x i16> addrspace(1)* %aptr, i32 %tid
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%gep1 = getelementptr <4 x i16>, <4 x i16> addrspace(1)* %bptr, i32 %tid
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%outgep = getelementptr <4 x i16>, <4 x i16> addrspace(1)* %out, i32 %tid
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%a = load <4 x i16>, <4 x i16> addrspace(1)* %gep0, align 4
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%b = load <4 x i16>, <4 x i16> addrspace(1)* %gep1, align 4
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%cmp = icmp sge <4 x i16> %a, %b
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%val = select <4 x i1> %cmp, <4 x i16> %a, <4 x i16> %b
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store <4 x i16> %val, <4 x i16> addrspace(1)* %outgep, align 4
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ret void
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}
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; FIXME: Need to handle non-uniform case for function below (load without gep).
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; GCN-LABEL: {{^}}v_test_imax_sgt_i16:
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; VIPLUS: v_max_i16_e32
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define amdgpu_kernel void @v_test_imax_sgt_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %aptr, i16 addrspace(1)* %bptr) nounwind {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep0 = getelementptr i16, i16 addrspace(1)* %aptr, i32 %tid
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%gep1 = getelementptr i16, i16 addrspace(1)* %bptr, i32 %tid
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%outgep = getelementptr i16, i16 addrspace(1)* %out, i32 %tid
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%a = load i16, i16 addrspace(1)* %gep0, align 4
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%b = load i16, i16 addrspace(1)* %gep1, align 4
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%cmp = icmp sgt i16 %a, %b
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%val = select i1 %cmp, i16 %a, i16 %b
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store i16 %val, i16 addrspace(1)* %outgep, align 4
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ret void
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}
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; FIXME: Need to handle non-uniform case for function below (load without gep).
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; GCN-LABEL: {{^}}v_test_umax_uge_i16:
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; VIPLUS: v_max_u16_e32
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define amdgpu_kernel void @v_test_umax_uge_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %aptr, i16 addrspace(1)* %bptr) nounwind {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep0 = getelementptr i16, i16 addrspace(1)* %aptr, i32 %tid
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%gep1 = getelementptr i16, i16 addrspace(1)* %bptr, i32 %tid
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%outgep = getelementptr i16, i16 addrspace(1)* %out, i32 %tid
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%a = load i16, i16 addrspace(1)* %gep0, align 4
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%b = load i16, i16 addrspace(1)* %gep1, align 4
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%cmp = icmp uge i16 %a, %b
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%val = select i1 %cmp, i16 %a, i16 %b
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store i16 %val, i16 addrspace(1)* %outgep, align 4
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ret void
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}
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; FIXME: Need to handle non-uniform case for function below (load without gep).
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; GCN-LABEL: {{^}}v_test_umax_ugt_i16:
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; VIPLUS: v_max_u16_e32
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define amdgpu_kernel void @v_test_umax_ugt_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %aptr, i16 addrspace(1)* %bptr) nounwind {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep0 = getelementptr i16, i16 addrspace(1)* %aptr, i32 %tid
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%gep1 = getelementptr i16, i16 addrspace(1)* %bptr, i32 %tid
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%outgep = getelementptr i16, i16 addrspace(1)* %out, i32 %tid
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%a = load i16, i16 addrspace(1)* %gep0, align 4
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%b = load i16, i16 addrspace(1)* %gep1, align 4
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%cmp = icmp ugt i16 %a, %b
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%val = select i1 %cmp, i16 %a, i16 %b
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store i16 %val, i16 addrspace(1)* %outgep, align 4
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ret void
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}
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; GCN-LABEL: {{^}}v_test_umax_ugt_v2i16:
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; VI: v_max_u16_e32
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; VI: v_max_u16_sdwa
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; GFX9: v_pk_max_u16 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @v_test_umax_ugt_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %aptr, <2 x i16> addrspace(1)* %bptr) nounwind {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep0 = getelementptr <2 x i16>, <2 x i16> addrspace(1)* %aptr, i32 %tid
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%gep1 = getelementptr <2 x i16>, <2 x i16> addrspace(1)* %bptr, i32 %tid
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%outgep = getelementptr <2 x i16>, <2 x i16> addrspace(1)* %out, i32 %tid
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%a = load <2 x i16>, <2 x i16> addrspace(1)* %gep0, align 4
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%b = load <2 x i16>, <2 x i16> addrspace(1)* %gep1, align 4
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%cmp = icmp ugt <2 x i16> %a, %b
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%val = select <2 x i1> %cmp, <2 x i16> %a, <2 x i16> %b
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store <2 x i16> %val, <2 x i16> addrspace(1)* %outgep, align 4
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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