70 lines
2.3 KiB
LLVM
70 lines
2.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=armv6-unknown-linux-gnu | FileCheck %s --check-prefixes=ARMV6
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; RUN: llc < %s -mtriple=armv7-unknown-linux-gnu | FileCheck %s --check-prefixes=ARMV7
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define { i64, i8 } @mulodi_test(i64 %l, i64 %r) unnamed_addr #0 {
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; ARMV6-LABEL: mulodi_test:
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; ARMV6: @ %bb.0: @ %start
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; ARMV6-NEXT: push {r4, r5, r6, lr}
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; ARMV6-NEXT: umull r12, lr, r3, r0
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; ARMV6-NEXT: mov r6, #0
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; ARMV6-NEXT: umull r4, r5, r1, r2
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; ARMV6-NEXT: umull r0, r2, r0, r2
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; ARMV6-NEXT: add r4, r4, r12
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; ARMV6-NEXT: adds r12, r2, r4
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; ARMV6-NEXT: adc r2, r6, #0
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; ARMV6-NEXT: cmp r3, #0
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; ARMV6-NEXT: movne r3, #1
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; ARMV6-NEXT: cmp r1, #0
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; ARMV6-NEXT: movne r1, #1
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; ARMV6-NEXT: cmp r5, #0
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; ARMV6-NEXT: and r1, r1, r3
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; ARMV6-NEXT: movne r5, #1
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; ARMV6-NEXT: cmp lr, #0
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; ARMV6-NEXT: orr r1, r1, r5
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; ARMV6-NEXT: movne lr, #1
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; ARMV6-NEXT: orr r1, r1, lr
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; ARMV6-NEXT: orr r2, r1, r2
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; ARMV6-NEXT: mov r1, r12
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; ARMV6-NEXT: pop {r4, r5, r6, pc}
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;
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; ARMV7-LABEL: mulodi_test:
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; ARMV7: @ %bb.0: @ %start
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; ARMV7-NEXT: push {r4, r5, r11, lr}
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; ARMV7-NEXT: umull r12, lr, r1, r2
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; ARMV7-NEXT: cmp r3, #0
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; ARMV7-NEXT: umull r4, r5, r3, r0
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; ARMV7-NEXT: movwne r3, #1
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; ARMV7-NEXT: cmp r1, #0
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; ARMV7-NEXT: movwne r1, #1
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; ARMV7-NEXT: umull r0, r2, r0, r2
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; ARMV7-NEXT: cmp lr, #0
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; ARMV7-NEXT: and r1, r1, r3
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; ARMV7-NEXT: movwne lr, #1
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; ARMV7-NEXT: cmp r5, #0
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; ARMV7-NEXT: orr r1, r1, lr
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; ARMV7-NEXT: movwne r5, #1
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; ARMV7-NEXT: orr r3, r1, r5
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; ARMV7-NEXT: add r1, r12, r4
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; ARMV7-NEXT: mov r5, #0
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; ARMV7-NEXT: adds r1, r2, r1
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; ARMV7-NEXT: adc r2, r5, #0
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; ARMV7-NEXT: orr r2, r3, r2
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; ARMV7-NEXT: pop {r4, r5, r11, pc}
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start:
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%0 = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %l, i64 %r) #2
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%1 = extractvalue { i64, i1 } %0, 0
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%2 = extractvalue { i64, i1 } %0, 1
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%3 = zext i1 %2 to i8
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%4 = insertvalue { i64, i8 } undef, i64 %1, 0
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%5 = insertvalue { i64, i8 } %4, i8 %3, 1
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ret { i64, i8 } %5
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}
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; Function Attrs: nounwind readnone speculatable
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declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #1
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attributes #0 = { nounwind readnone uwtable }
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attributes #1 = { nounwind readnone speculatable }
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attributes #2 = { nounwind }
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