34 lines
		
	
	
		
			1.3 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			34 lines
		
	
	
		
			1.3 KiB
		
	
	
	
		
			LLVM
		
	
	
	
| ; RUN: llc -march=hexagon -mattr="+hvxv60,+hvx-length64b" < %s
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| ; REQUIRES: asserts
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| 
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| target triple = "hexagon"
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| 
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| ; Function Attrs: nounwind
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| define void @fred() #0 {
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| entry:
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|   br label %for.body9.us
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| 
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| for.body9.us:
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|   %cmp10.us = icmp eq i32 0, undef
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|   %.h63h32.2.us = select i1 %cmp10.us, <16 x i32> zeroinitializer, <16 x i32> undef
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|   %0 = tail call <16 x i32> @llvm.hexagon.V6.valignbi(<16 x i32> %.h63h32.2.us, <16 x i32> undef, i32 2)
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|   %1 = tail call <32 x i32> @llvm.hexagon.V6.vswap(<512 x i1> undef, <16 x i32> undef, <16 x i32> %0)
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|   %2 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %1)
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|   %3 = tail call <32 x i32> @llvm.hexagon.V6.vshuffvdd(<16 x i32> undef, <16 x i32> %2, i32 62)
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|   %4 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %3)
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|   store <16 x i32> %4, <16 x i32>* undef, align 64
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|   br i1 undef, label %for.body9.us, label %for.body43.us.preheader
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| 
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| for.body43.us.preheader:                          ; preds = %for.body9.us
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|   ret void
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| }
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| 
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| declare <16 x i32> @llvm.hexagon.V6.valignbi(<16 x i32>, <16 x i32>, i32) #1
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| declare <32 x i32> @llvm.hexagon.V6.vswap(<512 x i1>, <16 x i32>, <16 x i32>) #1
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| declare <16 x i32> @llvm.hexagon.V6.hi(<32 x i32>) #1
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| declare <16 x i32> @llvm.hexagon.V6.lo(<32 x i32>) #1
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| declare <32 x i32> @llvm.hexagon.V6.vshuffvdd(<16 x i32>, <16 x i32>, i32) #1
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| 
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| attributes #0 = { nounwind }
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| attributes #1 = { nounwind readnone }
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