75 lines
2.1 KiB
LLVM
75 lines
2.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r2 -mattr=+dsp < %s | FileCheck %s --check-prefix=DSP
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; RUN: llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r2 -mattr=+dsp,+micromips < %s | FileCheck %s --check-prefix=MMDSP
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define i64 @n(i64 %a, i64 %b) {
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; DSP-LABEL: n:
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; DSP: # %bb.0: # %entry
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; DSP-NEXT: addsc $3, $7, $5
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; DSP-NEXT: addwc $2, $6, $4
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; DSP-NEXT: jr $ra
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; DSP-NEXT: nop
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;
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; MMDSP-LABEL: n:
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; MMDSP: # %bb.0: # %entry
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; MMDSP-NEXT: addsc $3, $7, $5
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; MMDSP-NEXT: addwc $2, $6, $4
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; MMDSP-NEXT: jrc $ra
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entry:
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%add = add i64 %b, %a
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ret i64 %add
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}
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define i128 @m(i128 zeroext %a, i128 zeroext %b) {
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; DSP-LABEL: m:
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; DSP: # %bb.0: # %entry
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; DSP-NEXT: lw $1, 28($sp)
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; DSP-NEXT: lw $2, 24($sp)
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; DSP-NEXT: addsc $1, $1, $7
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; DSP-NEXT: addwc $6, $2, $6
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; DSP-NEXT: rddsp $2, 1
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; DSP-NEXT: ext $3, $2, 20, 1
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; DSP-NEXT: ins $3, $2, 6, 1
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; DSP-NEXT: ins $3, $zero, 20, 1
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; DSP-NEXT: lw $2, 20($sp)
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; DSP-NEXT: wrdsp $3, 1
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; DSP-NEXT: addwc $3, $2, $5
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; DSP-NEXT: rddsp $2, 1
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; DSP-NEXT: ext $5, $2, 20, 1
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; DSP-NEXT: lw $7, 16($sp)
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; DSP-NEXT: ins $5, $2, 6, 1
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; DSP-NEXT: ins $5, $zero, 20, 1
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; DSP-NEXT: wrdsp $5, 1
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; DSP-NEXT: addwc $2, $7, $4
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; DSP-NEXT: move $4, $6
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; DSP-NEXT: jr $ra
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; DSP-NEXT: move $5, $1
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;
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; MMDSP-LABEL: m:
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; MMDSP: # %bb.0: # %entry
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; MMDSP-NEXT: lw $1, 28($sp)
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; MMDSP-NEXT: lw $2, 24($sp)
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; MMDSP-NEXT: addsc $1, $1, $7
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; MMDSP-NEXT: addwc $6, $2, $6
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; MMDSP-NEXT: rddsp $2, 1
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; MMDSP-NEXT: ext $3, $2, 20, 1
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; MMDSP-NEXT: ins $3, $2, 6, 1
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; MMDSP-NEXT: ins $3, $zero, 20, 1
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; MMDSP-NEXT: lw $2, 20($sp)
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; MMDSP-NEXT: wrdsp $3, 1
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; MMDSP-NEXT: addwc $3, $2, $5
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; MMDSP-NEXT: rddsp $2, 1
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; MMDSP-NEXT: ext $5, $2, 20, 1
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; MMDSP-NEXT: lw $7, 16($sp)
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; MMDSP-NEXT: ins $5, $2, 6, 1
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; MMDSP-NEXT: ins $5, $zero, 20, 1
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; MMDSP-NEXT: wrdsp $5, 1
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; MMDSP-NEXT: addwc $2, $7, $4
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; MMDSP-NEXT: move $4, $6
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; MMDSP-NEXT: move $5, $1
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; MMDSP-NEXT: jrc $ra
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entry:
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%add = add i128 %b, %a
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ret i128 %add
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}
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