182 lines
4.9 KiB
LLVM
182 lines
4.9 KiB
LLVM
; Test 32-bit atomic minimum and maximum. Here we match the z10 versions,
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; which can't use LOCR.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
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; Check signed minium.
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define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
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; CHECK-LABEL: f1:
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; CHECK: l %r2, 0(%r3)
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; CHECK: j [[LOOP:\.[^:]*]]
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; CHECK: [[BB1:\.[^:]*]]:
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; CHECK: cs %r2, [[NEW:%r[0-9]+]], 0(%r3)
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; CHECK: ber %r14
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; CHECK: [[LOOP]]:
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; CHECK: lr [[NEW]], %r2
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; CHECK: crjle %r2, %r4, [[KEEP:\..*]]
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; CHECK: lr [[NEW]], %r4
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; CHECK: j [[BB1]]
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%res = atomicrmw min i32 *%src, i32 %b seq_cst
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ret i32 %res
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}
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; Check signed maximum.
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define i32 @f2(i32 %dummy, i32 *%src, i32 %b) {
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; CHECK-LABEL: f2:
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; CHECK: l %r2, 0(%r3)
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; CHECK: j [[LOOP:\.[^:]*]]
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; CHECK: [[BB1:\.[^:]*]]:
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; CHECK: cs %r2, [[NEW:%r[0-9]+]], 0(%r3)
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; CHECK: ber %r14
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; CHECK: [[LOOP]]:
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; CHECK: lr [[NEW]], %r2
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; CHECK: crjhe %r2, %r4, [[KEEP:\..*]]
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; CHECK: lr [[NEW]], %r4
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; CHECK: j [[BB1]]
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%res = atomicrmw max i32 *%src, i32 %b seq_cst
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ret i32 %res
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}
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; Check unsigned minimum.
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define i32 @f3(i32 %dummy, i32 *%src, i32 %b) {
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; CHECK-LABEL: f3:
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; CHECK: l %r2, 0(%r3)
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; CHECK: j [[LOOP:\.[^:]*]]
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; CHECK: [[BB1:\.[^:]*]]:
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; CHECK: cs %r2, [[NEW:%r[0-9]+]], 0(%r3)
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; CHECK: ber %r14
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; CHECK: [[LOOP]]:
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; CHECK: lr [[NEW]], %r2
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; CHECK: clrjle %r2, %r4, [[KEEP:\..*]]
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; CHECK: lr [[NEW]], %r4
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; CHECK: j [[BB1]]
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%res = atomicrmw umin i32 *%src, i32 %b seq_cst
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ret i32 %res
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}
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; Check unsigned maximum.
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define i32 @f4(i32 %dummy, i32 *%src, i32 %b) {
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; CHECK-LABEL: f4:
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; CHECK: l %r2, 0(%r3)
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; CHECK: j [[LOOP:\.[^:]*]]
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; CHECK: [[BB1:\.[^:]*]]:
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; CHECK: cs %r2, [[NEW:%r[0-9]+]], 0(%r3)
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; CHECK: ber %r14
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; CHECK: [[LOOP]]:
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; CHECK: lr [[NEW]], %r2
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; CHECK: clrjhe %r2, %r4, [[KEEP:\..*]]
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; CHECK: lr [[NEW]], %r4
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; CHECK: j [[BB1]]
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%res = atomicrmw umax i32 *%src, i32 %b seq_cst
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ret i32 %res
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}
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; Check the high end of the aligned CS range.
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define i32 @f5(i32 %dummy, i32 *%src, i32 %b) {
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; CHECK-LABEL: f5:
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; CHECK: l %r2, 4092(%r3)
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; CHECK: cs %r2, {{%r[0-9]+}}, 4092(%r3)
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; CHECK: ber %r14
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%ptr = getelementptr i32, i32 *%src, i64 1023
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%res = atomicrmw min i32 *%ptr, i32 %b seq_cst
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ret i32 %res
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}
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; Check the next word up, which requires CSY.
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define i32 @f6(i32 %dummy, i32 *%src, i32 %b) {
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; CHECK-LABEL: f6:
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; CHECK: ly %r2, 4096(%r3)
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; CHECK: csy %r2, {{%r[0-9]+}}, 4096(%r3)
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; CHECK: ber %r14
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%ptr = getelementptr i32, i32 *%src, i64 1024
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%res = atomicrmw min i32 *%ptr, i32 %b seq_cst
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ret i32 %res
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}
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; Check the high end of the aligned CSY range.
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define i32 @f7(i32 %dummy, i32 *%src, i32 %b) {
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; CHECK-LABEL: f7:
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; CHECK: ly %r2, 524284(%r3)
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; CHECK: csy %r2, {{%r[0-9]+}}, 524284(%r3)
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; CHECK: ber %r14
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%ptr = getelementptr i32, i32 *%src, i64 131071
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%res = atomicrmw min i32 *%ptr, i32 %b seq_cst
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ret i32 %res
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}
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; Check the next word up, which needs separate address logic.
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define i32 @f8(i32 %dummy, i32 *%src, i32 %b) {
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; CHECK-LABEL: f8:
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; CHECK: agfi %r3, 524288
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; CHECK: l %r2, 0(%r3)
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; CHECK: cs %r2, {{%r[0-9]+}}, 0(%r3)
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; CHECK: ber %r14
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%ptr = getelementptr i32, i32 *%src, i64 131072
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%res = atomicrmw min i32 *%ptr, i32 %b seq_cst
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ret i32 %res
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}
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; Check the high end of the negative aligned CSY range.
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define i32 @f9(i32 %dummy, i32 *%src, i32 %b) {
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; CHECK-LABEL: f9:
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; CHECK: ly %r2, -4(%r3)
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; CHECK: csy %r2, {{%r[0-9]+}}, -4(%r3)
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; CHECK: ber %r14
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%ptr = getelementptr i32, i32 *%src, i64 -1
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%res = atomicrmw min i32 *%ptr, i32 %b seq_cst
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ret i32 %res
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}
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; Check the low end of the CSY range.
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define i32 @f10(i32 %dummy, i32 *%src, i32 %b) {
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; CHECK-LABEL: f10:
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; CHECK: ly %r2, -524288(%r3)
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; CHECK: csy %r2, {{%r[0-9]+}}, -524288(%r3)
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; CHECK: ber %r14
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%ptr = getelementptr i32, i32 *%src, i64 -131072
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%res = atomicrmw min i32 *%ptr, i32 %b seq_cst
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ret i32 %res
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}
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; Check the next word down, which needs separate address logic.
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define i32 @f11(i32 %dummy, i32 *%src, i32 %b) {
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; CHECK-LABEL: f11:
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; CHECK: agfi %r3, -524292
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; CHECK: l %r2, 0(%r3)
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; CHECK: cs %r2, {{%r[0-9]+}}, 0(%r3)
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; CHECK: ber %r14
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%ptr = getelementptr i32, i32 *%src, i64 -131073
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%res = atomicrmw min i32 *%ptr, i32 %b seq_cst
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ret i32 %res
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}
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; Check that indexed addresses are not allowed.
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define i32 @f12(i32 %dummy, i64 %base, i64 %index, i32 %b) {
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; CHECK-LABEL: f12:
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; CHECK: agr %r3, %r4
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; CHECK: l %r2, 0(%r3)
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; CHECK: cs %r2, {{%r[0-9]+}}, 0(%r3)
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; CHECK: ber %r14
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%add = add i64 %base, %index
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%ptr = inttoptr i64 %add to i32 *
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%res = atomicrmw min i32 *%ptr, i32 %b seq_cst
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ret i32 %res
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}
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; Check that constants are handled.
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define i32 @f13(i32 %dummy, i32 *%ptr) {
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; CHECK-LABEL: f13:
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; CHECK: lhi [[LIMIT:%r[0-9]+]], 42
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; CHECK: j [[LOOP:\.[^:]*]]
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; CHECK: [[BB1:\.[^:]*]]:
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; CHECK: cs %r2, [[NEW:%r[0-9]+]], 0(%r3)
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; CHECK: ber %r14
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; CHECK: [[LOOP]]:
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; CHECK: lr [[NEW]], %r2
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; CHECK: crjle %r2, [[LIMIT]], [[KEEP:\..*]]
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; CHECK: lhi [[NEW]], 42
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; CHECK: j [[BB1]]
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%res = atomicrmw min i32 *%ptr, i32 42 seq_cst
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ret i32 %res
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}
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