383 lines
		
	
	
		
			11 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			383 lines
		
	
	
		
			11 KiB
		
	
	
	
		
			LLVM
		
	
	
	
| ; Test 64-bit comparison in which the second operand is a zero-extended i32.
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| ;
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| ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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| 
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| declare i64 @foo()
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| 
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| ; Check unsigned register comparison.
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| define double @f1(double %a, double %b, i64 %i1, i32 %unext) {
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| ; CHECK-LABEL: f1:
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| ; CHECK: clgfr %r2, %r3
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| ; CHECK-NEXT: blr %r14
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| ; CHECK: ldr %f0, %f2
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| ; CHECK: br %r14
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|   %i2 = zext i32 %unext to i64
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|   %cond = icmp ult i64 %i1, %i2
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|   %res = select i1 %cond, double %a, double %b
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|   ret double %res
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| }
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| 
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| ; ...and again with a different representation.
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| define double @f2(double %a, double %b, i64 %i1, i64 %unext) {
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| ; CHECK-LABEL: f2:
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| ; CHECK: clgfr %r2, %r3
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| ; CHECK-NEXT: blr %r14
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| ; CHECK: ldr %f0, %f2
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| ; CHECK: br %r14
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|   %i2 = and i64 %unext, 4294967295
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|   %cond = icmp ult i64 %i1, %i2
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|   %res = select i1 %cond, double %a, double %b
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|   ret double %res
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| }
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| 
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| ; Check signed register comparison, which can't use CLGFR.
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| define double @f3(double %a, double %b, i64 %i1, i32 %unext) {
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| ; CHECK-LABEL: f3:
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| ; CHECK-NOT: clgfr
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| ; CHECK: br %r14
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|   %i2 = zext i32 %unext to i64
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|   %cond = icmp slt i64 %i1, %i2
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|   %res = select i1 %cond, double %a, double %b
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|   ret double %res
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| }
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| 
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| ; ...and again with a different representation
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| define double @f4(double %a, double %b, i64 %i1, i64 %unext) {
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| ; CHECK-LABEL: f4:
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| ; CHECK-NOT: clgfr
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| ; CHECK: br %r14
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|   %i2 = and i64 %unext, 4294967295
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|   %cond = icmp slt i64 %i1, %i2
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|   %res = select i1 %cond, double %a, double %b
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|   ret double %res
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| }
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| 
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| ; Check register equality.
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| define double @f5(double %a, double %b, i64 %i1, i32 %unext) {
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| ; CHECK-LABEL: f5:
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| ; CHECK: clgfr %r2, %r3
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| ; CHECK-NEXT: ber %r14
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| ; CHECK: ldr %f0, %f2
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| ; CHECK: br %r14
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|   %i2 = zext i32 %unext to i64
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|   %cond = icmp eq i64 %i1, %i2
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|   %res = select i1 %cond, double %a, double %b
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|   ret double %res
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| }
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| 
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| ; ...and again with a different representation
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| define double @f6(double %a, double %b, i64 %i1, i64 %unext) {
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| ; CHECK-LABEL: f6:
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| ; CHECK: clgfr %r2, %r3
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| ; CHECK-NEXT: ber %r14
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| ; CHECK: ldr %f0, %f2
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| ; CHECK: br %r14
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|   %i2 = and i64 %unext, 4294967295
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|   %cond = icmp eq i64 %i1, %i2
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|   %res = select i1 %cond, double %a, double %b
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|   ret double %res
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| }
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| 
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| ; Check register inequality.
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| define double @f7(double %a, double %b, i64 %i1, i32 %unext) {
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| ; CHECK-LABEL: f7:
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| ; CHECK: clgfr %r2, %r3
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| ; CHECK-NEXT: blhr %r14
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| ; CHECK: ldr %f0, %f2
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| ; CHECK: br %r14
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|   %i2 = zext i32 %unext to i64
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|   %cond = icmp ne i64 %i1, %i2
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|   %res = select i1 %cond, double %a, double %b
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|   ret double %res
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| }
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| 
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| ; ...and again with a different representation
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| define double @f8(double %a, double %b, i64 %i1, i64 %unext) {
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| ; CHECK-LABEL: f8:
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| ; CHECK: clgfr %r2, %r3
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| ; CHECK-NEXT: blhr %r14
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| ; CHECK: ldr %f0, %f2
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| ; CHECK: br %r14
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|   %i2 = and i64 %unext, 4294967295
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|   %cond = icmp ne i64 %i1, %i2
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|   %res = select i1 %cond, double %a, double %b
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|   ret double %res
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| }
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| 
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| ; Check unsigned comparison with memory.
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| define double @f9(double %a, double %b, i64 %i1, i32 *%ptr) {
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| ; CHECK-LABEL: f9:
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| ; CHECK: clgf %r2, 0(%r3)
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| ; CHECK-NEXT: blr %r14
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| ; CHECK: ldr %f0, %f2
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| ; CHECK: br %r14
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|   %unext = load i32, i32 *%ptr
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|   %i2 = zext i32 %unext to i64
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|   %cond = icmp ult i64 %i1, %i2
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|   %res = select i1 %cond, double %a, double %b
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|   ret double %res
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| }
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| 
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| ; Check signed comparison with memory.
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| define double @f10(double %a, double %b, i64 %i1, i32 *%ptr) {
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| ; CHECK-LABEL: f10:
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| ; CHECK-NOT: clgf
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| ; CHECK: br %r14
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|   %unext = load i32, i32 *%ptr
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|   %i2 = zext i32 %unext to i64
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|   %cond = icmp slt i64 %i1, %i2
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|   %res = select i1 %cond, double %a, double %b
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|   ret double %res
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| }
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| 
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| ; Check memory equality.
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| define double @f11(double %a, double %b, i64 %i1, i32 *%ptr) {
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| ; CHECK-LABEL: f11:
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| ; CHECK: clgf %r2, 0(%r3)
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| ; CHECK-NEXT: ber %r14
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| ; CHECK: ldr %f0, %f2
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| ; CHECK: br %r14
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|   %unext = load i32, i32 *%ptr
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|   %i2 = zext i32 %unext to i64
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|   %cond = icmp eq i64 %i1, %i2
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|   %res = select i1 %cond, double %a, double %b
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|   ret double %res
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| }
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| 
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| ; Check memory inequality.
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| define double @f12(double %a, double %b, i64 %i1, i32 *%ptr) {
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| ; CHECK-LABEL: f12:
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| ; CHECK: clgf %r2, 0(%r3)
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| ; CHECK-NEXT: blhr %r14
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| ; CHECK: ldr %f0, %f2
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| ; CHECK: br %r14
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|   %unext = load i32, i32 *%ptr
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|   %i2 = zext i32 %unext to i64
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|   %cond = icmp ne i64 %i1, %i2
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|   %res = select i1 %cond, double %a, double %b
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|   ret double %res
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| }
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| 
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| ; Check the high end of the aligned CLGF range.
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| define double @f13(double %a, double %b, i64 %i1, i32 *%base) {
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| ; CHECK-LABEL: f13:
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| ; CHECK: clgf %r2, 524284(%r3)
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| ; CHECK-NEXT: blr %r14
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| ; CHECK: ldr %f0, %f2
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| ; CHECK: br %r14
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|   %ptr = getelementptr i32, i32 *%base, i64 131071
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|   %unext = load i32, i32 *%ptr
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|   %i2 = zext i32 %unext to i64
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|   %cond = icmp ult i64 %i1, %i2
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|   %res = select i1 %cond, double %a, double %b
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|   ret double %res
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| }
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| 
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| ; Check the next word up, which needs separate address logic.
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| ; Other sequences besides this one would be OK.
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| define double @f14(double %a, double %b, i64 %i1, i32 *%base) {
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| ; CHECK-LABEL: f14:
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| ; CHECK: agfi %r3, 524288
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| ; CHECK: clgf %r2, 0(%r3)
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| ; CHECK-NEXT: blr %r14
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| ; CHECK: ldr %f0, %f2
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| ; CHECK: br %r14
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|   %ptr = getelementptr i32, i32 *%base, i64 131072
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|   %unext = load i32, i32 *%ptr
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|   %i2 = zext i32 %unext to i64
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|   %cond = icmp ult i64 %i1, %i2
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|   %res = select i1 %cond, double %a, double %b
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|   ret double %res
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| }
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| 
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| ; Check the high end of the negative aligned CLGF range.
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| define double @f15(double %a, double %b, i64 %i1, i32 *%base) {
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| ; CHECK-LABEL: f15:
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| ; CHECK: clgf %r2, -4(%r3)
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| ; CHECK-NEXT: blr %r14
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| ; CHECK: ldr %f0, %f2
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| ; CHECK: br %r14
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|   %ptr = getelementptr i32, i32 *%base, i64 -1
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|   %unext = load i32, i32 *%ptr
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|   %i2 = zext i32 %unext to i64
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|   %cond = icmp ult i64 %i1, %i2
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|   %res = select i1 %cond, double %a, double %b
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|   ret double %res
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| }
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| 
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| ; Check the low end of the CLGF range.
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| define double @f16(double %a, double %b, i64 %i1, i32 *%base) {
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| ; CHECK-LABEL: f16:
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| ; CHECK: clgf %r2, -524288(%r3)
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| ; CHECK-NEXT: blr %r14
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| ; CHECK: ldr %f0, %f2
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| ; CHECK: br %r14
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|   %ptr = getelementptr i32, i32 *%base, i64 -131072
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|   %unext = load i32, i32 *%ptr
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|   %i2 = zext i32 %unext to i64
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|   %cond = icmp ult i64 %i1, %i2
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|   %res = select i1 %cond, double %a, double %b
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|   ret double %res
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| }
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| 
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| ; Check the next word down, which needs separate address logic.
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| ; Other sequences besides this one would be OK.
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| define double @f17(double %a, double %b, i64 %i1, i32 *%base) {
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| ; CHECK-LABEL: f17:
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| ; CHECK: agfi %r3, -524292
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| ; CHECK: clgf %r2, 0(%r3)
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| ; CHECK-NEXT: blr %r14
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| ; CHECK: ldr %f0, %f2
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| ; CHECK: br %r14
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|   %ptr = getelementptr i32, i32 *%base, i64 -131073
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|   %unext = load i32, i32 *%ptr
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|   %i2 = zext i32 %unext to i64
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|   %cond = icmp ult i64 %i1, %i2
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|   %res = select i1 %cond, double %a, double %b
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|   ret double %res
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| }
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| 
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| ; Check that CLGF allows an index.
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| define double @f18(double %a, double %b, i64 %i1, i64 %base, i64 %index) {
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| ; CHECK-LABEL: f18:
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| ; CHECK: clgf %r2, 524284({{%r4,%r3|%r3,%r4}})
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| ; CHECK-NEXT: blr %r14
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| ; CHECK: ldr %f0, %f2
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| ; CHECK: br %r14
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|   %add1 = add i64 %base, %index
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|   %add2 = add i64 %add1, 524284
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|   %ptr = inttoptr i64 %add2 to i32 *
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|   %unext = load i32, i32 *%ptr
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|   %i2 = zext i32 %unext to i64
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|   %cond = icmp ult i64 %i1, %i2
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|   %res = select i1 %cond, double %a, double %b
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|   ret double %res
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| }
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| 
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| ; Check that comparisons of spilled values can use CLGF rather than CLGFR.
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| define i64 @f19(i32 *%ptr0) {
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| ; CHECK-LABEL: f19:
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| ; CHECK: brasl %r14, foo@PLT
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| ; CHECK: clgf {{%r[0-9]+}}, 16{{[04]}}(%r15)
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| ; CHECK: br %r14
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|   %ptr1 = getelementptr i32, i32 *%ptr0, i64 2
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|   %ptr2 = getelementptr i32, i32 *%ptr0, i64 4
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|   %ptr3 = getelementptr i32, i32 *%ptr0, i64 6
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|   %ptr4 = getelementptr i32, i32 *%ptr0, i64 8
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|   %ptr5 = getelementptr i32, i32 *%ptr0, i64 10
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|   %ptr6 = getelementptr i32, i32 *%ptr0, i64 12
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|   %ptr7 = getelementptr i32, i32 *%ptr0, i64 14
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|   %ptr8 = getelementptr i32, i32 *%ptr0, i64 16
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|   %ptr9 = getelementptr i32, i32 *%ptr0, i64 18
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| 
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|   %val0 = load i32, i32 *%ptr0
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|   %val1 = load i32, i32 *%ptr1
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|   %val2 = load i32, i32 *%ptr2
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|   %val3 = load i32, i32 *%ptr3
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|   %val4 = load i32, i32 *%ptr4
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|   %val5 = load i32, i32 *%ptr5
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|   %val6 = load i32, i32 *%ptr6
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|   %val7 = load i32, i32 *%ptr7
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|   %val8 = load i32, i32 *%ptr8
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|   %val9 = load i32, i32 *%ptr9
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| 
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|   %frob0 = add i32 %val0, 100
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|   %frob1 = add i32 %val1, 100
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|   %frob2 = add i32 %val2, 100
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|   %frob3 = add i32 %val3, 100
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|   %frob4 = add i32 %val4, 100
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|   %frob5 = add i32 %val5, 100
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|   %frob6 = add i32 %val6, 100
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|   %frob7 = add i32 %val7, 100
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|   %frob8 = add i32 %val8, 100
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|   %frob9 = add i32 %val9, 100
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| 
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|   store i32 %frob0, i32 *%ptr0
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|   store i32 %frob1, i32 *%ptr1
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|   store i32 %frob2, i32 *%ptr2
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|   store i32 %frob3, i32 *%ptr3
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|   store i32 %frob4, i32 *%ptr4
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|   store i32 %frob5, i32 *%ptr5
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|   store i32 %frob6, i32 *%ptr6
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|   store i32 %frob7, i32 *%ptr7
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|   store i32 %frob8, i32 *%ptr8
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|   store i32 %frob9, i32 *%ptr9
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| 
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|   %ret = call i64 @foo()
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| 
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|   %ext0 = zext i32 %frob0 to i64
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|   %ext1 = zext i32 %frob1 to i64
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|   %ext2 = zext i32 %frob2 to i64
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|   %ext3 = zext i32 %frob3 to i64
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|   %ext4 = zext i32 %frob4 to i64
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|   %ext5 = zext i32 %frob5 to i64
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|   %ext6 = zext i32 %frob6 to i64
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|   %ext7 = zext i32 %frob7 to i64
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|   %ext8 = zext i32 %frob8 to i64
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|   %ext9 = zext i32 %frob9 to i64
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| 
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|   %cmp0 = icmp ult i64 %ret, %ext0
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|   %cmp1 = icmp ult i64 %ret, %ext1
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|   %cmp2 = icmp ult i64 %ret, %ext2
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|   %cmp3 = icmp ult i64 %ret, %ext3
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|   %cmp4 = icmp ult i64 %ret, %ext4
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|   %cmp5 = icmp ult i64 %ret, %ext5
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|   %cmp6 = icmp ult i64 %ret, %ext6
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|   %cmp7 = icmp ult i64 %ret, %ext7
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|   %cmp8 = icmp ult i64 %ret, %ext8
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|   %cmp9 = icmp ult i64 %ret, %ext9
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| 
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|   %sel0 = select i1 %cmp0, i64 %ret, i64 0
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|   %sel1 = select i1 %cmp1, i64 %sel0, i64 1
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|   %sel2 = select i1 %cmp2, i64 %sel1, i64 2
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|   %sel3 = select i1 %cmp3, i64 %sel2, i64 3
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|   %sel4 = select i1 %cmp4, i64 %sel3, i64 4
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|   %sel5 = select i1 %cmp5, i64 %sel4, i64 5
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|   %sel6 = select i1 %cmp6, i64 %sel5, i64 6
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|   %sel7 = select i1 %cmp7, i64 %sel6, i64 7
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|   %sel8 = select i1 %cmp8, i64 %sel7, i64 8
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|   %sel9 = select i1 %cmp9, i64 %sel8, i64 9
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| 
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|   ret i64 %sel9
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| }
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| 
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| ; Check the comparison can be reversed if that allows CLGFR to be used.
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| define double @f20(double %a, double %b, i64 %i1, i32 %unext) {
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| ; CHECK-LABEL: f20:
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| ; CHECK: clgfr %r2, %r3
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| ; CHECK-NEXT: bhr %r14
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| ; CHECK: ldr %f0, %f2
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| ; CHECK: br %r14
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|   %i2 = zext i32 %unext to i64
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|   %cond = icmp ult i64 %i2, %i1
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|   %res = select i1 %cond, double %a, double %b
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|   ret double %res
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| }
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| 
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| ; ...and again with the AND representation.
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| define double @f21(double %a, double %b, i64 %i1, i64 %unext) {
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| ; CHECK-LABEL: f21:
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| ; CHECK: clgfr %r2, %r3
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| ; CHECK-NEXT: bhr %r14
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| ; CHECK: ldr %f0, %f2
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| ; CHECK: br %r14
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|   %i2 = and i64 %unext, 4294967295
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|   %cond = icmp ult i64 %i2, %i1
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|   %res = select i1 %cond, double %a, double %b
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|   ret double %res
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| }
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| 
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| ; Check the comparison can be reversed if that allows CLGF to be used.
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| define double @f22(double %a, double %b, i64 %i2, i32 *%ptr) {
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| ; CHECK-LABEL: f22:
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| ; CHECK: clgf %r2, 0(%r3)
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| ; CHECK-NEXT: bhr %r14
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| ; CHECK: ldr %f0, %f2
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| ; CHECK: br %r14
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|   %unext = load i32, i32 *%ptr
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|   %i1 = zext i32 %unext to i64
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|   %cond = icmp ult i64 %i1, %i2
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|   %res = select i1 %cond, double %a, double %b
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|   ret double %res
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| }
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