25 lines
		
	
	
		
			401 B
		
	
	
	
		
			TableGen
		
	
	
	
			
		
		
	
	
			25 lines
		
	
	
		
			401 B
		
	
	
	
		
			TableGen
		
	
	
	
| // RUN: llvm-tblgen %s | FileCheck %s
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| // XFAIL: vg_leak
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| 
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| class Instr<list<dag> pat> {
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|   list<dag> Pattern = pat;
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| }
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| 
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| class Reg {
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|   int a = 3;
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| }
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| 
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| def VR128 : Reg;
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| def mem_frag;
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| def set;
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| def addr;
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| def shufp : Reg;
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| 
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| multiclass shuffle<Reg RC> {
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|   def rri : Instr<[(set RC:$dst, (shufp:$src3
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|                                        RC:$src1, RC:$src2))]>;
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| }
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| 
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| // CHECK: shufp:src3
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| defm ADD : shuffle<VR128>;
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