61 lines
1.5 KiB
LLVM
61 lines
1.5 KiB
LLVM
; RUN: opt < %s -mtriple=arm-unknown-linux-gnu -S -inline | FileCheck %s
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; RUN: opt < %s -mtriple=arm-unknown-linux-gnu -S -passes='cgscc(inline)' | FileCheck %s
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; Check that we only inline when we have compatible target attributes.
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; ARM has implemented a target attribute that will verify that the attribute
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; sets are compatible.
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define i32 @foo() #0 {
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entry:
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%call = call i32 (...) @baz()
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ret i32 %call
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; CHECK-LABEL: foo
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; CHECK: call i32 (...) @baz()
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}
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declare i32 @baz(...) #0
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define i32 @bar() #1 {
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entry:
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%call = call i32 @foo()
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ret i32 %call
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; CHECK-LABEL: bar
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; CHECK: call i32 (...) @baz()
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}
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define i32 @qux() #0 {
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entry:
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%call = call i32 @bar()
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ret i32 %call
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; CHECK-LABEL: qux
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; CHECK: call i32 @bar()
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}
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define i32 @thumb_fn() #2 {
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entry:
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%call = call i32 @foo()
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ret i32 %call
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; CHECK-LABEL: thumb_fn
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; CHECK: call i32 @foo
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}
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define i32 @strict_align() #3 {
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entry:
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%call = call i32 @foo()
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ret i32 %call
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; CHECK-LABEL: strict_align
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; CHECK: call i32 (...) @baz()
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}
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define i32 @soft_float_fn() #4 {
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entry:
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%call = call i32 @foo()
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ret i32 %call
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; CHECK-LABEL: soft_float_fn
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; CHECK: call i32 @foo
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}
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attributes #0 = { "target-cpu"="generic" "target-features"="+dsp,+neon" }
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attributes #1 = { "target-cpu"="generic" "target-features"="+dsp,+neon,+fp16" }
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attributes #2 = { "target-cpu"="generic" "target-features"="+dsp,+neon,+fp16,+thumb-mode" }
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attributes #3 = { "target-cpu"="generic" "target-features"="+dsp,+neon,+strict-align" }
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attributes #4 = { "target-cpu"="generic" "target-features"="+dsp,+neon,+fp16,+soft-float" }
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