168 lines
6.1 KiB
LLVM
168 lines
6.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -basicaa -loop-interchange -verify-dom-info -verify-loop-info -verify-scev -verify-loop-lcssa -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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@A = common global [100 x [100 x i64]] zeroinitializer
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@B = common global [100 x i64] zeroinitializer
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;; for(int i=0;i<100;i++)
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;; for(int j=0;j<100;j++)
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;; A[j][i] = A[j][i]+k;
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define void @interchange_01(i64 %k, i64 %N) {
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; CHECK-LABEL: @interchange_01(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR2_PREHEADER:%.*]]
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; CHECK: for1.header.preheader:
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; CHECK-NEXT: br label [[FOR1_HEADER:%.*]]
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; CHECK: for1.header:
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; CHECK-NEXT: [[INDVARS_IV23:%.*]] = phi i64 [ [[INDVARS_IV_NEXT24:%.*]], [[FOR1_INC10:%.*]] ], [ 0, [[FOR1_HEADER_PREHEADER:%.*]] ]
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; CHECK-NEXT: br label [[FOR2_SPLIT1:%.*]]
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; CHECK: for2.preheader:
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; CHECK-NEXT: br label [[FOR2:%.*]]
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; CHECK: for2:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR2_SPLIT:%.*]] ], [ 0, [[FOR2_PREHEADER]] ]
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; CHECK-NEXT: br label [[FOR1_HEADER_PREHEADER]]
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; CHECK: for2.split1:
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; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [100 x [100 x i64]], [100 x [100 x i64]]* @A, i64 0, i64 [[INDVARS_IV]], i64 [[INDVARS_IV23]]
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; CHECK-NEXT: [[LV:%.*]] = load i64, i64* [[ARRAYIDX5]]
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[LV]], [[K:%.*]]
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; CHECK-NEXT: store i64 [[ADD]], i64* [[ARRAYIDX5]]
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; CHECK-NEXT: br label [[FOR1_INC10]]
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; CHECK: for2.split:
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV]], 99
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END12:%.*]], label [[FOR2]]
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; CHECK: for1.inc10:
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; CHECK-NEXT: [[INDVARS_IV_NEXT24]] = add nuw nsw i64 [[INDVARS_IV23]], 1
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; CHECK-NEXT: [[EXITCOND26:%.*]] = icmp eq i64 [[INDVARS_IV23]], 99
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; CHECK-NEXT: br i1 [[EXITCOND26]], label [[FOR2_SPLIT]], label [[FOR1_HEADER]]
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; CHECK: for.end12:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %for1.header
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for1.header:
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%j23 = phi i64 [ 0, %entry ], [ %j.next24, %for1.inc10 ]
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br label %for2
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for2:
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%j = phi i64 [ %j.next, %for2 ], [ 0, %for1.header ]
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%arrayidx5 = getelementptr inbounds [100 x [100 x i64]], [100 x [100 x i64]]* @A, i64 0, i64 %j, i64 %j23
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%lv = load i64, i64* %arrayidx5
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%add = add nsw i64 %lv, %k
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store i64 %add, i64* %arrayidx5
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%j.next = add nuw nsw i64 %j, 1
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%exitcond = icmp eq i64 %j, 99
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br i1 %exitcond, label %for1.inc10, label %for2
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for1.inc10:
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%j.next24 = add nuw nsw i64 %j23, 1
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%exitcond26 = icmp eq i64 %j23, 99
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br i1 %exitcond26, label %for.end12, label %for1.header
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for.end12:
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ret void
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}
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;; for(int i=0;i<100;i++)
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;; for(int j=100;j>=0;j--)
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;; A[j][i] = A[j][i]+k;
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define void @interchange_02(i64 %k) {
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; CHECK-LABEL: @interchange_02(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR3_PREHEADER:%.*]]
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; CHECK: for1.header.preheader:
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; CHECK-NEXT: br label [[FOR1_HEADER:%.*]]
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; CHECK: for1.header:
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; CHECK-NEXT: [[INDVARS_IV19:%.*]] = phi i64 [ [[INDVARS_IV_NEXT20:%.*]], [[FOR1_INC10:%.*]] ], [ 0, [[FOR1_HEADER_PREHEADER:%.*]] ]
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; CHECK-NEXT: br label [[FOR3_SPLIT1:%.*]]
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; CHECK: for3.preheader:
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; CHECK-NEXT: br label [[FOR3:%.*]]
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; CHECK: for3:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR3_SPLIT:%.*]] ], [ 100, [[FOR3_PREHEADER]] ]
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; CHECK-NEXT: br label [[FOR1_HEADER_PREHEADER]]
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; CHECK: for3.split1:
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; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [100 x [100 x i64]], [100 x [100 x i64]]* @A, i64 0, i64 [[INDVARS_IV]], i64 [[INDVARS_IV19]]
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; CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* [[ARRAYIDX5]]
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP0]], [[K:%.*]]
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; CHECK-NEXT: store i64 [[ADD]], i64* [[ARRAYIDX5]]
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; CHECK-NEXT: br label [[FOR1_INC10]]
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; CHECK: for3.split:
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
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; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i64 [[INDVARS_IV]], 0
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; CHECK-NEXT: br i1 [[CMP2]], label [[FOR3]], label [[FOR_END11:%.*]]
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; CHECK: for1.inc10:
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; CHECK-NEXT: [[INDVARS_IV_NEXT20]] = add nuw nsw i64 [[INDVARS_IV19]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT20]], 100
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR3_SPLIT]], label [[FOR1_HEADER]]
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; CHECK: for.end11:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %for1.header
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for1.header:
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%j19 = phi i64 [ 0, %entry ], [ %j.next20, %for1.inc10 ]
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br label %for3
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for3:
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%j = phi i64 [ 100, %for1.header ], [ %j.next, %for3 ]
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%arrayidx5 = getelementptr inbounds [100 x [100 x i64]], [100 x [100 x i64]]* @A, i64 0, i64 %j, i64 %j19
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%0 = load i64, i64* %arrayidx5
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%add = add nsw i64 %0, %k
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store i64 %add, i64* %arrayidx5
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%j.next = add nsw i64 %j, -1
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%cmp2 = icmp sgt i64 %j, 0
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br i1 %cmp2, label %for3, label %for1.inc10
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for1.inc10:
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%j.next20 = add nuw nsw i64 %j19, 1
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%exitcond = icmp eq i64 %j.next20, 100
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br i1 %exitcond, label %for.end11, label %for1.header
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for.end11:
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ret void
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}
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;; Test to make sure we can handle output dependencies.
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;;
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;; for (int i = 1; i < 100; ++i)
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;; for(int j = 1; j < 99; ++j) {
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;; A[j][i] = i;
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;; A[j][i+1] = j;
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;; }
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;; FIXME: DA misses this case after D35430
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define void @interchange_10() {
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entry:
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br label %for1.header
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for1.header:
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%j23 = phi i64 [ 1, %entry ], [ %j.next24, %for1.inc10 ]
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%j.next24 = add nuw nsw i64 %j23, 1
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br label %for2
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for2:
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%j = phi i64 [ %j.next, %for2 ], [ 1, %for1.header ]
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%j.next = add nuw nsw i64 %j, 1
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%arrayidx5 = getelementptr inbounds [100 x [100 x i64]], [100 x [100 x i64]]* @A, i64 0, i64 %j, i64 %j23
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store i64 %j, i64* %arrayidx5
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%arrayidx10 = getelementptr inbounds [100 x [100 x i64]], [100 x [100 x i64]]* @A, i64 0, i64 %j, i64 %j.next24
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store i64 %j23, i64* %arrayidx10
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%exitcond = icmp eq i64 %j, 99
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br i1 %exitcond, label %for1.inc10, label %for2
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for1.inc10:
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%exitcond26 = icmp eq i64 %j23, 98
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br i1 %exitcond26, label %for.end12, label %for1.header
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for.end12:
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ret void
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}
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