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llvm-project/llvm/test/CodeGen
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Matt Arsenault f9a42ed0a7 AMDGPU: Relax 32-bit SGPR register class 
Mostly use SReg_32 instead of SReg_32_XM0 for arbitrary values. This
will allow the register coalescer to do a better job eliminating
copies to m0.

For GlobalISel, as a terrible hack, use SGPR_32 for things that should
use SCC until booleans are solved.

llvm-svn: 375267
 		2019-10-18 18:26:37 +00:00
..
AArch64 [AArch64][SVE] Add SPLAT_VECTOR ISD Node 2019-10-18 11:48:35 +00:00
AMDGPU AMDGPU: Relax 32-bit SGPR register class 2019-10-18 18:26:37 +00:00
ARC
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ARM [Codegen] Alter the default promotion for saturating adds and subs 2019-10-18 09:47:48 +00:00
AVR
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BPF bpf: fix wrong truncation elimination when there is back-edge/loop 2019-10-16 15:27:59 +00:00
Generic Reapply r374743 with a fix for the ocaml binding 2019-10-14 16:15:14 +00:00
Hexagon [DFAPacketizer] Use DFAEmitter. NFC. 2019-10-17 08:34:29 +00:00
Inputs
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Lanai [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
MIR [Alignment] Migrate Attribute::getWith(Stack)Alignment 2019-10-15 12:56:24 +00:00
MSP430 [DAGCombiner] add operation legality checks before creating shift ops (PR43542) 2019-10-03 21:34:04 +00:00
Mips [MIPS GlobalISel] Add MSA registers to fprb. Select vector load, store 2019-10-15 09:30:08 +00:00
NVPTX [NVPTX] Restructure shfl instrinsics and add variants that return a predicate. 2019-10-14 16:53:34 +00:00
PowerPC Revert r375152 as it is causing failures on EXPENSIVE_CHECKS bot 2019-10-18 13:38:46 +00:00
RISCV [RISCV] Add MachineInstr immediate verification 2019-10-16 15:06:02 +00:00
SPARC
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SystemZ [FPEnv] Strict FP tests should use the requisite function attributes. 2019-10-04 17:03:46 +00:00
Thumb (Re)generate various tests. NFC 2019-10-08 16:16:26 +00:00
Thumb2 [ARM][MVE] Enable truncating masked stores 2019-10-17 12:11:18 +00:00
WebAssembly [WebAssembly] Allow multivalue types in block signature operands 2019-10-15 18:28:22 +00:00
WinCFGuard
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WinEH [Windows] Replace TrapUnreachable with an int3 insertion pass 2019-09-09 23:04:25 +00:00
X86 [X86] Regenerate memcmp tests and add X64-AVX512 common prefix 2019-10-18 09:59:51 +00:00
XCore
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