Sam Parker 39af8a3a3b [DAGCombine][ARM] Enable extending masked loads ... Add generic DAG combine for extending masked loads. Allow us to generate sext/zext masked loads which can access v4i8, v8i8 and v4i16 memory to produce v4i32, v8i16 and v4i32 respectively. Differential Revision: https://reviews.llvm.org/D68337 llvm-svn: 375085		2019-10-17 07:55:55 +00:00
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arm-ieee-vectorize.ll	[ARM] Permit auto-vectorization using MVE	2019-08-11 08:42:57 +00:00
arm-unroll.ll	…
gather-cost.ll	…
gcc-examples.ll	…
interleaved_cost.ll	…
lit.local.cfg	[lit] Delete empty lines at the end of lit.local.cfg NFC	2019-06-17 09:51:07 +00:00
mul-cast-vect.ll	…
mve-interleaved-cost.ll	[ARM] Don't pretend we know how to generate MVE VLDn	2019-08-16 13:06:49 +00:00
mve-maskedldst.ll	[DAGCombine][ARM] Enable extending masked loads	2019-10-17 07:55:55 +00:00
sphinx.ll	…
tail-loop-folding.ll	[LV] Add ARM MVE tail-folding tests	2019-09-16 14:56:26 +00:00
vector_cast.ll	…
width-detect.ll	…