317 lines
8.6 KiB
C++
317 lines
8.6 KiB
C++
//===-- CrashReason.cpp -----------------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "CrashReason.h"
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#include <sstream>
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namespace {
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void
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AppendFaultAddr (std::string& str, lldb::addr_t addr)
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{
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std::stringstream ss;
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ss << " (fault address: 0x" << std::hex << addr << ")";
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str += ss.str();
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}
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CrashReason
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GetCrashReasonForSIGSEGV(const siginfo_t& info)
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{
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assert(info.si_signo == SIGSEGV);
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switch (info.si_code)
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{
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#ifdef SI_KERNEL
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case SI_KERNEL:
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// Some platforms will occasionally send nonstandard spurious SI_KERNEL codes.
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// One way to get this is via unaligned SIMD loads.
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return CrashReason::eInvalidAddress; // for lack of anything better
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#endif
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case SEGV_MAPERR:
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return CrashReason::eInvalidAddress;
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case SEGV_ACCERR:
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return CrashReason::ePrivilegedAddress;
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}
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assert(false && "unexpected si_code for SIGSEGV");
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return CrashReason::eInvalidCrashReason;
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}
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CrashReason
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GetCrashReasonForSIGILL(const siginfo_t& info)
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{
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assert(info.si_signo == SIGILL);
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switch (info.si_code)
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{
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case ILL_ILLOPC:
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return CrashReason::eIllegalOpcode;
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case ILL_ILLOPN:
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return CrashReason::eIllegalOperand;
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case ILL_ILLADR:
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return CrashReason::eIllegalAddressingMode;
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case ILL_ILLTRP:
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return CrashReason::eIllegalTrap;
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case ILL_PRVOPC:
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return CrashReason::ePrivilegedOpcode;
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case ILL_PRVREG:
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return CrashReason::ePrivilegedRegister;
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case ILL_COPROC:
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return CrashReason::eCoprocessorError;
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case ILL_BADSTK:
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return CrashReason::eInternalStackError;
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}
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assert(false && "unexpected si_code for SIGILL");
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return CrashReason::eInvalidCrashReason;
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}
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CrashReason
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GetCrashReasonForSIGFPE(const siginfo_t& info)
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{
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assert(info.si_signo == SIGFPE);
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switch (info.si_code)
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{
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case FPE_INTDIV:
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return CrashReason::eIntegerDivideByZero;
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case FPE_INTOVF:
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return CrashReason::eIntegerOverflow;
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case FPE_FLTDIV:
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return CrashReason::eFloatDivideByZero;
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case FPE_FLTOVF:
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return CrashReason::eFloatOverflow;
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case FPE_FLTUND:
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return CrashReason::eFloatUnderflow;
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case FPE_FLTRES:
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return CrashReason::eFloatInexactResult;
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case FPE_FLTINV:
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return CrashReason::eFloatInvalidOperation;
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case FPE_FLTSUB:
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return CrashReason::eFloatSubscriptRange;
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}
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assert(false && "unexpected si_code for SIGFPE");
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return CrashReason::eInvalidCrashReason;
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}
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CrashReason
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GetCrashReasonForSIGBUS(const siginfo_t& info)
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{
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assert(info.si_signo == SIGBUS);
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switch (info.si_code)
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{
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case BUS_ADRALN:
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return CrashReason::eIllegalAlignment;
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case BUS_ADRERR:
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return CrashReason::eIllegalAddress;
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case BUS_OBJERR:
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return CrashReason::eHardwareError;
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}
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assert(false && "unexpected si_code for SIGBUS");
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return CrashReason::eInvalidCrashReason;
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}
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}
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std::string
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GetCrashReasonString (CrashReason reason, lldb::addr_t fault_addr)
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{
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std::string str;
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switch (reason)
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{
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default:
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assert(false && "invalid CrashReason");
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break;
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case CrashReason::eInvalidAddress:
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str = "signal SIGSEGV: invalid address";
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AppendFaultAddr (str, fault_addr);
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break;
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case CrashReason::ePrivilegedAddress:
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str = "signal SIGSEGV: address access protected";
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AppendFaultAddr (str, fault_addr);
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break;
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case CrashReason::eIllegalOpcode:
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str = "signal SIGILL: illegal instruction";
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break;
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case CrashReason::eIllegalOperand:
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str = "signal SIGILL: illegal instruction operand";
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break;
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case CrashReason::eIllegalAddressingMode:
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str = "signal SIGILL: illegal addressing mode";
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break;
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case CrashReason::eIllegalTrap:
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str = "signal SIGILL: illegal trap";
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break;
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case CrashReason::ePrivilegedOpcode:
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str = "signal SIGILL: privileged instruction";
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break;
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case CrashReason::ePrivilegedRegister:
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str = "signal SIGILL: privileged register";
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break;
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case CrashReason::eCoprocessorError:
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str = "signal SIGILL: coprocessor error";
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break;
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case CrashReason::eInternalStackError:
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str = "signal SIGILL: internal stack error";
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break;
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case CrashReason::eIllegalAlignment:
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str = "signal SIGBUS: illegal alignment";
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break;
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case CrashReason::eIllegalAddress:
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str = "signal SIGBUS: illegal address";
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break;
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case CrashReason::eHardwareError:
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str = "signal SIGBUS: hardware error";
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break;
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case CrashReason::eIntegerDivideByZero:
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str = "signal SIGFPE: integer divide by zero";
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break;
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case CrashReason::eIntegerOverflow:
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str = "signal SIGFPE: integer overflow";
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break;
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case CrashReason::eFloatDivideByZero:
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str = "signal SIGFPE: floating point divide by zero";
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break;
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case CrashReason::eFloatOverflow:
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str = "signal SIGFPE: floating point overflow";
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break;
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case CrashReason::eFloatUnderflow:
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str = "signal SIGFPE: floating point underflow";
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break;
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case CrashReason::eFloatInexactResult:
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str = "signal SIGFPE: inexact floating point result";
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break;
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case CrashReason::eFloatInvalidOperation:
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str = "signal SIGFPE: invalid floating point operation";
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break;
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case CrashReason::eFloatSubscriptRange:
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str = "signal SIGFPE: invalid floating point subscript range";
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break;
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}
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return str;
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}
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const char *
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CrashReasonAsString (CrashReason reason)
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{
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#ifdef LLDB_CONFIGURATION_BUILDANDINTEGRATION
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// Just return the code in ascii for integration builds.
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chcar str[8];
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sprintf(str, "%d", reason);
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#else
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const char *str = nullptr;
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switch (reason)
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{
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case CrashReason::eInvalidCrashReason:
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str = "eInvalidCrashReason";
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break;
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// SIGSEGV crash reasons.
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case CrashReason::eInvalidAddress:
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str = "eInvalidAddress";
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break;
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case CrashReason::ePrivilegedAddress:
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str = "ePrivilegedAddress";
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break;
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// SIGILL crash reasons.
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case CrashReason::eIllegalOpcode:
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str = "eIllegalOpcode";
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break;
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case CrashReason::eIllegalOperand:
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str = "eIllegalOperand";
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break;
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case CrashReason::eIllegalAddressingMode:
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str = "eIllegalAddressingMode";
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break;
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case CrashReason::eIllegalTrap:
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str = "eIllegalTrap";
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break;
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case CrashReason::ePrivilegedOpcode:
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str = "ePrivilegedOpcode";
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break;
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case CrashReason::ePrivilegedRegister:
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str = "ePrivilegedRegister";
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break;
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case CrashReason::eCoprocessorError:
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str = "eCoprocessorError";
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break;
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case CrashReason::eInternalStackError:
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str = "eInternalStackError";
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break;
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// SIGBUS crash reasons:
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case CrashReason::eIllegalAlignment:
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str = "eIllegalAlignment";
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break;
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case CrashReason::eIllegalAddress:
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str = "eIllegalAddress";
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break;
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case CrashReason::eHardwareError:
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str = "eHardwareError";
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break;
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// SIGFPE crash reasons:
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case CrashReason::eIntegerDivideByZero:
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str = "eIntegerDivideByZero";
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break;
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case CrashReason::eIntegerOverflow:
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str = "eIntegerOverflow";
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break;
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case CrashReason::eFloatDivideByZero:
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str = "eFloatDivideByZero";
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break;
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case CrashReason::eFloatOverflow:
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str = "eFloatOverflow";
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break;
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case CrashReason::eFloatUnderflow:
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str = "eFloatUnderflow";
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break;
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case CrashReason::eFloatInexactResult:
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str = "eFloatInexactResult";
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break;
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case CrashReason::eFloatInvalidOperation:
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str = "eFloatInvalidOperation";
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break;
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case CrashReason::eFloatSubscriptRange:
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str = "eFloatSubscriptRange";
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break;
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}
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#endif
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return str;
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}
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CrashReason
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GetCrashReason(const siginfo_t& info)
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{
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switch(info.si_signo)
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{
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case SIGSEGV:
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return GetCrashReasonForSIGSEGV(info);
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case SIGBUS:
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return GetCrashReasonForSIGBUS(info);
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case SIGFPE:
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return GetCrashReasonForSIGFPE(info);
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case SIGILL:
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return GetCrashReasonForSIGILL(info);
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}
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assert(false && "unexpected signal");
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return CrashReason::eInvalidCrashReason;
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}
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