llvm-project/llvm/test/MC/Disassembler
Freddy Ye 3ee58e2f35 [X86] Add WRMSRNS instructions.
For more details about these instructions, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D135935
2022-10-19 13:04:11 +08:00
..
AArch64 [AArch64InstPrinter] Introduce register markup tags emission 2022-09-13 20:52:02 -07:00
AMDGPU [AMDGPU][MC][GFX8+] Correct v_cndmask modifiers 2022-10-14 19:37:27 +03:00
ARC [ARC] Add ADC (addition with carry) and SBC (subtraction with carry) instructions 2021-08-25 07:46:15 -07:00
ARM [ARM] Implement PAC return address signing mechanism for PACBTI-M 2021-12-07 10:15:19 +00:00
Hexagon
Lanai
M68k [M68k] Add MC support for link/unlk 2022-08-08 11:00:11 +08:00
MSP430
Mips [MipsInstPrinter] Introduce markup tags emission 2022-09-01 20:52:09 -07:00
PowerPC [PowerPC] Set the special DSCR with a compiler option. 2022-03-31 14:06:30 -05:00
RISCV [RISCV] Add support for Zihintpause extention 2022-02-03 20:55:47 +08:00
Sparc
SystemZ Support z16 processor name 2022-04-21 19:58:22 +02:00
WebAssembly
X86 [X86] Add WRMSRNS instructions. 2022-10-19 13:04:11 +08:00
XCore