Sanjay Patel 8d76fbb5f0 [VectorCombine] fix crashing on match of non-canonical fneg ... We can't assume that operand 0 is the negated operand because the matcher handles "fsub -0.0, X" (and also +0.0 with FMF). By capturing the extract within the match, we avoid the bug and make the transform more robust (can't assume that this pass will only see canonical IR).		2022-10-17 10:47:48 -04:00
..
AArch64	[VectorCombine] Add insertelement-shufflevector VectorCombine tests	2022-10-13 14:10:06 +00:00
AMDGPU	[VectorCombine] Insert addrspacecast when crossing address space boundaries	2022-03-24 19:08:08 +00:00
Hexagon	…
X86	[VectorCombine] fix crashing on match of non-canonical fneg	2022-10-17 10:47:48 -04:00
load-insert-store.ll	…