llvm-project/llvm/lib/Target/AVR
Ayke van Laethem ca27b026f9
[AVR] Do not clear r0 at interrupt entry
There is no reason to do this: it's a scratch register and can therefore
hold any arbitrary value. And because it is in an interrupt, this code
is performance critical so it should be as short as possible.

I believe r0 was cleared because of the following:

 1. There used to be a bug that the cleared register was r0, not r1 as
    it should have been.
 2. This was fixed in https://reviews.llvm.org/D99467, but left the code
    to clear r0.

This patch completes D99467 by removing the `clr r0` instruction.

Differential Revision: https://reviews.llvm.org/D116756
2022-01-19 14:22:13 +01:00
..
AsmParser [Target] Remove redundant member initialization (NFC) 2022-01-06 22:01:44 -08:00
Disassembler Move TargetRegistry.(h|cpp) from Support to MC 2021-10-08 14:51:48 -07:00
MCTargetDesc [MC][ARC][Mips] Replace MCContext::reportFatalError calls with reportError 2022-01-15 00:37:24 -08:00
TargetInfo Fix shlib builds for all lib/Target/*/TargetInfo libs 2021-10-08 15:21:13 -07:00
AVR.h [AVR] Remove redundant dynalloca SP save/restore pass 2022-01-19 14:22:13 +01:00
AVR.td [NFC] Run clang-format on llvm/lib/Trget/AVR/ 2021-09-04 20:05:15 +05:30
AVRAsmPrinter.cpp [asm] Remove explicit branch for modifier 'l' 2021-11-19 09:19:53 -05:00
AVRCallingConv.td [AVR] Mark call-clobbered registers as clobbered in interrupt handlers 2022-01-19 14:22:13 +01:00
AVRDevices.td [AVR] Add support for the tinyAVR 0-series and tinyAVR 1-series 2021-09-08 02:35:26 +00:00
AVRExpandPseudoInsts.cpp [AVR] Optimize int16 shift operation for shift amount greater than 8 2022-01-04 11:48:50 +00:00
AVRFrameLowering.cpp [AVR] Do not clear r0 at interrupt entry 2022-01-19 14:22:13 +01:00
AVRFrameLowering.h
AVRISelDAGToDAG.cpp [NFC] Run clang-format on llvm/lib/Trget/AVR/ 2021-09-04 20:05:15 +05:30
AVRISelLowering.cpp [NFC] Use Register instead of unsigned 2022-01-19 20:17:04 +08:00
AVRISelLowering.h [AVR] Optimize int16 shift operation for shift amount greater than 8 2022-01-04 11:48:50 +00:00
AVRInstrFormats.td [NFC] Run clang-format on llvm/lib/Trget/AVR/ 2021-09-04 20:05:15 +05:30
AVRInstrInfo.cpp [llvm] Use nullptr instead of 0 (NFC) 2021-12-28 08:52:25 -08:00
AVRInstrInfo.h [amdgpu] Handle the case where there is no scavenged register. 2021-10-27 18:37:27 -04:00
AVRInstrInfo.td [AVR] Optimize int16 shift operation for shift amount greater than 8 2022-01-04 11:48:50 +00:00
AVRMCInstLower.cpp [NFC] Run clang-format on llvm/lib/Trget/AVR/ 2021-09-04 20:05:15 +05:30
AVRMCInstLower.h [NFC] Run clang-format on llvm/lib/Trget/AVR/ 2021-09-04 20:05:15 +05:30
AVRMachineFunctionInfo.h [NFC] Run clang-format on llvm/lib/Trget/AVR/ 2021-09-04 20:05:15 +05:30
AVRRegisterInfo.cpp [AVR] Mark call-clobbered registers as clobbered in interrupt handlers 2022-01-19 14:22:13 +01:00
AVRRegisterInfo.h [llvm] Use nullptr instead of 0 (NFC) 2021-12-28 08:52:25 -08:00
AVRRegisterInfo.td [NFC] Run clang-format on llvm/lib/Trget/AVR/ 2021-09-04 20:05:15 +05:30
AVRRelaxMemOperations.cpp [NFC] Run clang-format on llvm/lib/Trget/AVR/ 2021-09-04 20:05:15 +05:30
AVRSelectionDAGInfo.h
AVRShiftExpand.cpp [AVR] Expand large shifts early in IR 2021-07-24 14:03:26 +02:00
AVRSubtarget.cpp [Target] Remove redundant member initialization (NFC) 2022-01-06 22:01:44 -08:00
AVRSubtarget.h [NFC] Run clang-format on llvm/lib/Trget/AVR/ 2021-09-04 20:05:15 +05:30
AVRTargetMachine.cpp [AVR] Remove redundant dynalloca SP save/restore pass 2022-01-19 14:22:13 +01:00
AVRTargetMachine.h [NFC] Run clang-format on llvm/lib/Trget/AVR/ 2021-09-04 20:05:15 +05:30
AVRTargetObjectFile.cpp [NFC] Run clang-format on llvm/lib/Trget/AVR/ 2021-09-04 20:05:15 +05:30
AVRTargetObjectFile.h
CMakeLists.txt [AVR] Expand large shifts early in IR 2021-07-24 14:03:26 +02:00
README.md
TODO.md

README.md

AVR backend

This experimental backend is for the 8-bit Atmel AVR microcontroller.