887 lines
		
	
	
		
			36 KiB
		
	
	
	
		
			C++
		
	
	
	
			
		
		
	
	
			887 lines
		
	
	
		
			36 KiB
		
	
	
	
		
			C++
		
	
	
	
//===-- ThreadSanitizer.cpp - race detector -------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file is a part of ThreadSanitizer, a race detector.
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//
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// The tool is under development, for the details about previous versions see
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// http://code.google.com/p/data-race-test
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//
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// The instrumentation phase is quite simple:
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//   - Insert calls to run-time library before every memory access.
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//      - Optimizations may apply to avoid instrumenting some of the accesses.
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//   - Insert calls at function entry/exit.
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// The rest is handled by the run-time library.
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//===----------------------------------------------------------------------===//
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#include "llvm/Transforms/Instrumentation/ThreadSanitizer.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/Optional.h"
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#include "llvm/ADT/SmallString.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/Analysis/CaptureTracking.h"
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#include "llvm/Analysis/TargetLibraryInfo.h"
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#include "llvm/Analysis/ValueTracking.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/IRBuilder.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/Intrinsics.h"
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#include "llvm/IR/LLVMContext.h"
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#include "llvm/IR/Metadata.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/Type.h"
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#include "llvm/InitializePasses.h"
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#include "llvm/ProfileData/InstrProf.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Transforms/Instrumentation.h"
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#include "llvm/Transforms/Utils/BasicBlockUtils.h"
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#include "llvm/Transforms/Utils/EscapeEnumerator.h"
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#include "llvm/Transforms/Utils/Local.h"
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#include "llvm/Transforms/Utils/ModuleUtils.h"
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using namespace llvm;
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#define DEBUG_TYPE "tsan"
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static cl::opt<bool> ClInstrumentMemoryAccesses(
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    "tsan-instrument-memory-accesses", cl::init(true),
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    cl::desc("Instrument memory accesses"), cl::Hidden);
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static cl::opt<bool>
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    ClInstrumentFuncEntryExit("tsan-instrument-func-entry-exit", cl::init(true),
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                              cl::desc("Instrument function entry and exit"),
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                              cl::Hidden);
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static cl::opt<bool> ClHandleCxxExceptions(
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    "tsan-handle-cxx-exceptions", cl::init(true),
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    cl::desc("Handle C++ exceptions (insert cleanup blocks for unwinding)"),
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    cl::Hidden);
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static cl::opt<bool> ClInstrumentAtomics("tsan-instrument-atomics",
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                                         cl::init(true),
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                                         cl::desc("Instrument atomics"),
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                                         cl::Hidden);
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static cl::opt<bool> ClInstrumentMemIntrinsics(
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    "tsan-instrument-memintrinsics", cl::init(true),
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    cl::desc("Instrument memintrinsics (memset/memcpy/memmove)"), cl::Hidden);
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static cl::opt<bool> ClDistinguishVolatile(
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    "tsan-distinguish-volatile", cl::init(false),
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    cl::desc("Emit special instrumentation for accesses to volatiles"),
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    cl::Hidden);
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static cl::opt<bool> ClInstrumentReadBeforeWrite(
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    "tsan-instrument-read-before-write", cl::init(false),
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    cl::desc("Do not eliminate read instrumentation for read-before-writes"),
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    cl::Hidden);
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static cl::opt<bool> ClCompoundReadBeforeWrite(
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    "tsan-compound-read-before-write", cl::init(false),
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    cl::desc("Emit special compound instrumentation for reads-before-writes"),
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    cl::Hidden);
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STATISTIC(NumInstrumentedReads, "Number of instrumented reads");
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STATISTIC(NumInstrumentedWrites, "Number of instrumented writes");
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STATISTIC(NumOmittedReadsBeforeWrite,
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          "Number of reads ignored due to following writes");
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STATISTIC(NumAccessesWithBadSize, "Number of accesses with bad size");
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STATISTIC(NumInstrumentedVtableWrites, "Number of vtable ptr writes");
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STATISTIC(NumInstrumentedVtableReads, "Number of vtable ptr reads");
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STATISTIC(NumOmittedReadsFromConstantGlobals,
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          "Number of reads from constant globals");
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STATISTIC(NumOmittedReadsFromVtable, "Number of vtable reads");
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STATISTIC(NumOmittedNonCaptured, "Number of accesses ignored due to capturing");
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const char kTsanModuleCtorName[] = "tsan.module_ctor";
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const char kTsanInitName[] = "__tsan_init";
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namespace {
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/// ThreadSanitizer: instrument the code in module to find races.
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///
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/// Instantiating ThreadSanitizer inserts the tsan runtime library API function
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/// declarations into the module if they don't exist already. Instantiating
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/// ensures the __tsan_init function is in the list of global constructors for
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/// the module.
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struct ThreadSanitizer {
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  ThreadSanitizer() {
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    // Check options and warn user.
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    if (ClInstrumentReadBeforeWrite && ClCompoundReadBeforeWrite) {
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      errs()
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          << "warning: Option -tsan-compound-read-before-write has no effect "
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             "when -tsan-instrument-read-before-write is set.\n";
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    }
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  }
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  bool sanitizeFunction(Function &F, const TargetLibraryInfo &TLI);
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private:
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  // Internal Instruction wrapper that contains more information about the
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  // Instruction from prior analysis.
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  struct InstructionInfo {
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    // Instrumentation emitted for this instruction is for a compounded set of
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    // read and write operations in the same basic block.
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    static constexpr unsigned kCompoundRW = (1U << 0);
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    explicit InstructionInfo(Instruction *Inst) : Inst(Inst) {}
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    Instruction *Inst;
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    unsigned Flags = 0;
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  };
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  void initialize(Module &M);
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  bool instrumentLoadOrStore(const InstructionInfo &II, const DataLayout &DL);
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  bool instrumentAtomic(Instruction *I, const DataLayout &DL);
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  bool instrumentMemIntrinsic(Instruction *I);
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  void chooseInstructionsToInstrument(SmallVectorImpl<Instruction *> &Local,
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                                      SmallVectorImpl<InstructionInfo> &All,
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                                      const DataLayout &DL);
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  bool addrPointsToConstantData(Value *Addr);
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  int getMemoryAccessFuncIndex(Type *OrigTy, Value *Addr, const DataLayout &DL);
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  void InsertRuntimeIgnores(Function &F);
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  Type *IntptrTy;
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  FunctionCallee TsanFuncEntry;
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  FunctionCallee TsanFuncExit;
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  FunctionCallee TsanIgnoreBegin;
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  FunctionCallee TsanIgnoreEnd;
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  // Accesses sizes are powers of two: 1, 2, 4, 8, 16.
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  static const size_t kNumberOfAccessSizes = 5;
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  FunctionCallee TsanRead[kNumberOfAccessSizes];
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  FunctionCallee TsanWrite[kNumberOfAccessSizes];
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  FunctionCallee TsanUnalignedRead[kNumberOfAccessSizes];
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  FunctionCallee TsanUnalignedWrite[kNumberOfAccessSizes];
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  FunctionCallee TsanVolatileRead[kNumberOfAccessSizes];
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  FunctionCallee TsanVolatileWrite[kNumberOfAccessSizes];
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  FunctionCallee TsanUnalignedVolatileRead[kNumberOfAccessSizes];
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  FunctionCallee TsanUnalignedVolatileWrite[kNumberOfAccessSizes];
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  FunctionCallee TsanCompoundRW[kNumberOfAccessSizes];
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  FunctionCallee TsanUnalignedCompoundRW[kNumberOfAccessSizes];
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  FunctionCallee TsanAtomicLoad[kNumberOfAccessSizes];
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  FunctionCallee TsanAtomicStore[kNumberOfAccessSizes];
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  FunctionCallee TsanAtomicRMW[AtomicRMWInst::LAST_BINOP + 1]
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                              [kNumberOfAccessSizes];
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  FunctionCallee TsanAtomicCAS[kNumberOfAccessSizes];
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  FunctionCallee TsanAtomicThreadFence;
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  FunctionCallee TsanAtomicSignalFence;
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  FunctionCallee TsanVptrUpdate;
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  FunctionCallee TsanVptrLoad;
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  FunctionCallee MemmoveFn, MemcpyFn, MemsetFn;
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};
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struct ThreadSanitizerLegacyPass : FunctionPass {
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  ThreadSanitizerLegacyPass() : FunctionPass(ID) {
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    initializeThreadSanitizerLegacyPassPass(*PassRegistry::getPassRegistry());
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  }
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  StringRef getPassName() const override;
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  void getAnalysisUsage(AnalysisUsage &AU) const override;
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  bool runOnFunction(Function &F) override;
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  bool doInitialization(Module &M) override;
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  static char ID; // Pass identification, replacement for typeid.
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private:
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  Optional<ThreadSanitizer> TSan;
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};
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void insertModuleCtor(Module &M) {
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  getOrCreateSanitizerCtorAndInitFunctions(
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      M, kTsanModuleCtorName, kTsanInitName, /*InitArgTypes=*/{},
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      /*InitArgs=*/{},
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      // This callback is invoked when the functions are created the first
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      // time. Hook them into the global ctors list in that case:
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      [&](Function *Ctor, FunctionCallee) { appendToGlobalCtors(M, Ctor, 0); });
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}
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}  // namespace
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PreservedAnalyses ThreadSanitizerPass::run(Function &F,
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                                           FunctionAnalysisManager &FAM) {
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  ThreadSanitizer TSan;
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  if (TSan.sanitizeFunction(F, FAM.getResult<TargetLibraryAnalysis>(F)))
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    return PreservedAnalyses::none();
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  return PreservedAnalyses::all();
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}
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PreservedAnalyses ModuleThreadSanitizerPass::run(Module &M,
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                                                 ModuleAnalysisManager &MAM) {
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  insertModuleCtor(M);
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  return PreservedAnalyses::none();
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}
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char ThreadSanitizerLegacyPass::ID = 0;
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INITIALIZE_PASS_BEGIN(ThreadSanitizerLegacyPass, "tsan",
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                      "ThreadSanitizer: detects data races.", false, false)
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INITIALIZE_PASS_DEPENDENCY(TargetLibraryInfoWrapperPass)
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INITIALIZE_PASS_END(ThreadSanitizerLegacyPass, "tsan",
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                    "ThreadSanitizer: detects data races.", false, false)
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StringRef ThreadSanitizerLegacyPass::getPassName() const {
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  return "ThreadSanitizerLegacyPass";
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}
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void ThreadSanitizerLegacyPass::getAnalysisUsage(AnalysisUsage &AU) const {
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  AU.addRequired<TargetLibraryInfoWrapperPass>();
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}
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bool ThreadSanitizerLegacyPass::doInitialization(Module &M) {
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  insertModuleCtor(M);
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  TSan.emplace();
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  return true;
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}
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bool ThreadSanitizerLegacyPass::runOnFunction(Function &F) {
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  auto &TLI = getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(F);
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  TSan->sanitizeFunction(F, TLI);
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  return true;
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}
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FunctionPass *llvm::createThreadSanitizerLegacyPassPass() {
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  return new ThreadSanitizerLegacyPass();
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}
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void ThreadSanitizer::initialize(Module &M) {
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  const DataLayout &DL = M.getDataLayout();
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  IntptrTy = DL.getIntPtrType(M.getContext());
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  IRBuilder<> IRB(M.getContext());
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  AttributeList Attr;
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  Attr = Attr.addFnAttribute(M.getContext(), Attribute::NoUnwind);
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  // Initialize the callbacks.
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  TsanFuncEntry = M.getOrInsertFunction("__tsan_func_entry", Attr,
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                                        IRB.getVoidTy(), IRB.getInt8PtrTy());
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  TsanFuncExit =
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      M.getOrInsertFunction("__tsan_func_exit", Attr, IRB.getVoidTy());
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  TsanIgnoreBegin = M.getOrInsertFunction("__tsan_ignore_thread_begin", Attr,
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                                          IRB.getVoidTy());
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  TsanIgnoreEnd =
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      M.getOrInsertFunction("__tsan_ignore_thread_end", Attr, IRB.getVoidTy());
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  IntegerType *OrdTy = IRB.getInt32Ty();
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  for (size_t i = 0; i < kNumberOfAccessSizes; ++i) {
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    const unsigned ByteSize = 1U << i;
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    const unsigned BitSize = ByteSize * 8;
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    std::string ByteSizeStr = utostr(ByteSize);
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    std::string BitSizeStr = utostr(BitSize);
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    SmallString<32> ReadName("__tsan_read" + ByteSizeStr);
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    TsanRead[i] = M.getOrInsertFunction(ReadName, Attr, IRB.getVoidTy(),
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                                        IRB.getInt8PtrTy());
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    SmallString<32> WriteName("__tsan_write" + ByteSizeStr);
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    TsanWrite[i] = M.getOrInsertFunction(WriteName, Attr, IRB.getVoidTy(),
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                                         IRB.getInt8PtrTy());
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    SmallString<64> UnalignedReadName("__tsan_unaligned_read" + ByteSizeStr);
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    TsanUnalignedRead[i] = M.getOrInsertFunction(
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        UnalignedReadName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
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    SmallString<64> UnalignedWriteName("__tsan_unaligned_write" + ByteSizeStr);
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    TsanUnalignedWrite[i] = M.getOrInsertFunction(
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        UnalignedWriteName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
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    SmallString<64> VolatileReadName("__tsan_volatile_read" + ByteSizeStr);
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    TsanVolatileRead[i] = M.getOrInsertFunction(
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        VolatileReadName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
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    SmallString<64> VolatileWriteName("__tsan_volatile_write" + ByteSizeStr);
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    TsanVolatileWrite[i] = M.getOrInsertFunction(
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        VolatileWriteName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
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    SmallString<64> UnalignedVolatileReadName("__tsan_unaligned_volatile_read" +
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                                              ByteSizeStr);
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    TsanUnalignedVolatileRead[i] = M.getOrInsertFunction(
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        UnalignedVolatileReadName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
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    SmallString<64> UnalignedVolatileWriteName(
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        "__tsan_unaligned_volatile_write" + ByteSizeStr);
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    TsanUnalignedVolatileWrite[i] = M.getOrInsertFunction(
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        UnalignedVolatileWriteName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
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    SmallString<64> CompoundRWName("__tsan_read_write" + ByteSizeStr);
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    TsanCompoundRW[i] = M.getOrInsertFunction(
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        CompoundRWName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
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    SmallString<64> UnalignedCompoundRWName("__tsan_unaligned_read_write" +
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                                            ByteSizeStr);
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    TsanUnalignedCompoundRW[i] = M.getOrInsertFunction(
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        UnalignedCompoundRWName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
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    Type *Ty = Type::getIntNTy(M.getContext(), BitSize);
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    Type *PtrTy = Ty->getPointerTo();
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    SmallString<32> AtomicLoadName("__tsan_atomic" + BitSizeStr + "_load");
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    {
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      AttributeList AL = Attr;
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      AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
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      TsanAtomicLoad[i] =
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          M.getOrInsertFunction(AtomicLoadName, AL, Ty, PtrTy, OrdTy);
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    }
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    SmallString<32> AtomicStoreName("__tsan_atomic" + BitSizeStr + "_store");
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    {
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      AttributeList AL = Attr;
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      AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
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      AL = AL.addParamAttribute(M.getContext(), 2, Attribute::ZExt);
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      TsanAtomicStore[i] = M.getOrInsertFunction(
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          AtomicStoreName, AL, IRB.getVoidTy(), PtrTy, Ty, OrdTy);
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    }
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    for (unsigned Op = AtomicRMWInst::FIRST_BINOP;
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         Op <= AtomicRMWInst::LAST_BINOP; ++Op) {
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      TsanAtomicRMW[Op][i] = nullptr;
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      const char *NamePart = nullptr;
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      if (Op == AtomicRMWInst::Xchg)
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        NamePart = "_exchange";
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      else if (Op == AtomicRMWInst::Add)
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        NamePart = "_fetch_add";
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      else if (Op == AtomicRMWInst::Sub)
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        NamePart = "_fetch_sub";
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      else if (Op == AtomicRMWInst::And)
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        NamePart = "_fetch_and";
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      else if (Op == AtomicRMWInst::Or)
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        NamePart = "_fetch_or";
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      else if (Op == AtomicRMWInst::Xor)
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        NamePart = "_fetch_xor";
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      else if (Op == AtomicRMWInst::Nand)
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        NamePart = "_fetch_nand";
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      else
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        continue;
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      SmallString<32> RMWName("__tsan_atomic" + itostr(BitSize) + NamePart);
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      {
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        AttributeList AL = Attr;
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        AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
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        AL = AL.addParamAttribute(M.getContext(), 2, Attribute::ZExt);
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        TsanAtomicRMW[Op][i] =
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            M.getOrInsertFunction(RMWName, AL, Ty, PtrTy, Ty, OrdTy);
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      }
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    }
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    SmallString<32> AtomicCASName("__tsan_atomic" + BitSizeStr +
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                                  "_compare_exchange_val");
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    {
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      AttributeList AL = Attr;
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      AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
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      AL = AL.addParamAttribute(M.getContext(), 2, Attribute::ZExt);
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      AL = AL.addParamAttribute(M.getContext(), 3, Attribute::ZExt);
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      AL = AL.addParamAttribute(M.getContext(), 4, Attribute::ZExt);
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      TsanAtomicCAS[i] = M.getOrInsertFunction(AtomicCASName, AL, Ty, PtrTy, Ty,
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                                               Ty, OrdTy, OrdTy);
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    }
 | 
						|
  }
 | 
						|
  TsanVptrUpdate =
 | 
						|
      M.getOrInsertFunction("__tsan_vptr_update", Attr, IRB.getVoidTy(),
 | 
						|
                            IRB.getInt8PtrTy(), IRB.getInt8PtrTy());
 | 
						|
  TsanVptrLoad = M.getOrInsertFunction("__tsan_vptr_read", Attr,
 | 
						|
                                       IRB.getVoidTy(), IRB.getInt8PtrTy());
 | 
						|
  {
 | 
						|
    AttributeList AL = Attr;
 | 
						|
    AL = AL.addParamAttribute(M.getContext(), 0, Attribute::ZExt);
 | 
						|
    TsanAtomicThreadFence = M.getOrInsertFunction("__tsan_atomic_thread_fence",
 | 
						|
                                                  AL, IRB.getVoidTy(), OrdTy);
 | 
						|
  }
 | 
						|
  {
 | 
						|
    AttributeList AL = Attr;
 | 
						|
    AL = AL.addParamAttribute(M.getContext(), 0, Attribute::ZExt);
 | 
						|
    TsanAtomicSignalFence = M.getOrInsertFunction("__tsan_atomic_signal_fence",
 | 
						|
                                                  AL, IRB.getVoidTy(), OrdTy);
 | 
						|
  }
 | 
						|
 | 
						|
  MemmoveFn =
 | 
						|
      M.getOrInsertFunction("memmove", Attr, IRB.getInt8PtrTy(),
 | 
						|
                            IRB.getInt8PtrTy(), IRB.getInt8PtrTy(), IntptrTy);
 | 
						|
  MemcpyFn =
 | 
						|
      M.getOrInsertFunction("memcpy", Attr, IRB.getInt8PtrTy(),
 | 
						|
                            IRB.getInt8PtrTy(), IRB.getInt8PtrTy(), IntptrTy);
 | 
						|
  MemsetFn =
 | 
						|
      M.getOrInsertFunction("memset", Attr, IRB.getInt8PtrTy(),
 | 
						|
                            IRB.getInt8PtrTy(), IRB.getInt32Ty(), IntptrTy);
 | 
						|
}
 | 
						|
 | 
						|
static bool isVtableAccess(Instruction *I) {
 | 
						|
  if (MDNode *Tag = I->getMetadata(LLVMContext::MD_tbaa))
 | 
						|
    return Tag->isTBAAVtableAccess();
 | 
						|
  return false;
 | 
						|
}
 | 
						|
 | 
						|
// Do not instrument known races/"benign races" that come from compiler
 | 
						|
// instrumentatin. The user has no way of suppressing them.
 | 
						|
static bool shouldInstrumentReadWriteFromAddress(const Module *M, Value *Addr) {
 | 
						|
  // Peel off GEPs and BitCasts.
 | 
						|
  Addr = Addr->stripInBoundsOffsets();
 | 
						|
 | 
						|
  if (GlobalVariable *GV = dyn_cast<GlobalVariable>(Addr)) {
 | 
						|
    if (GV->hasSection()) {
 | 
						|
      StringRef SectionName = GV->getSection();
 | 
						|
      // Check if the global is in the PGO counters section.
 | 
						|
      auto OF = Triple(M->getTargetTriple()).getObjectFormat();
 | 
						|
      if (SectionName.endswith(
 | 
						|
              getInstrProfSectionName(IPSK_cnts, OF, /*AddSegmentInfo=*/false)))
 | 
						|
        return false;
 | 
						|
    }
 | 
						|
 | 
						|
    // Check if the global is private gcov data.
 | 
						|
    if (GV->getName().startswith("__llvm_gcov") ||
 | 
						|
        GV->getName().startswith("__llvm_gcda"))
 | 
						|
      return false;
 | 
						|
  }
 | 
						|
 | 
						|
  // Do not instrument acesses from different address spaces; we cannot deal
 | 
						|
  // with them.
 | 
						|
  if (Addr) {
 | 
						|
    Type *PtrTy = cast<PointerType>(Addr->getType()->getScalarType());
 | 
						|
    if (PtrTy->getPointerAddressSpace() != 0)
 | 
						|
      return false;
 | 
						|
  }
 | 
						|
 | 
						|
  return true;
 | 
						|
}
 | 
						|
 | 
						|
bool ThreadSanitizer::addrPointsToConstantData(Value *Addr) {
 | 
						|
  // If this is a GEP, just analyze its pointer operand.
 | 
						|
  if (GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(Addr))
 | 
						|
    Addr = GEP->getPointerOperand();
 | 
						|
 | 
						|
  if (GlobalVariable *GV = dyn_cast<GlobalVariable>(Addr)) {
 | 
						|
    if (GV->isConstant()) {
 | 
						|
      // Reads from constant globals can not race with any writes.
 | 
						|
      NumOmittedReadsFromConstantGlobals++;
 | 
						|
      return true;
 | 
						|
    }
 | 
						|
  } else if (LoadInst *L = dyn_cast<LoadInst>(Addr)) {
 | 
						|
    if (isVtableAccess(L)) {
 | 
						|
      // Reads from a vtable pointer can not race with any writes.
 | 
						|
      NumOmittedReadsFromVtable++;
 | 
						|
      return true;
 | 
						|
    }
 | 
						|
  }
 | 
						|
  return false;
 | 
						|
}
 | 
						|
 | 
						|
// Instrumenting some of the accesses may be proven redundant.
 | 
						|
// Currently handled:
 | 
						|
//  - read-before-write (within same BB, no calls between)
 | 
						|
//  - not captured variables
 | 
						|
//
 | 
						|
// We do not handle some of the patterns that should not survive
 | 
						|
// after the classic compiler optimizations.
 | 
						|
// E.g. two reads from the same temp should be eliminated by CSE,
 | 
						|
// two writes should be eliminated by DSE, etc.
 | 
						|
//
 | 
						|
// 'Local' is a vector of insns within the same BB (no calls between).
 | 
						|
// 'All' is a vector of insns that will be instrumented.
 | 
						|
void ThreadSanitizer::chooseInstructionsToInstrument(
 | 
						|
    SmallVectorImpl<Instruction *> &Local,
 | 
						|
    SmallVectorImpl<InstructionInfo> &All, const DataLayout &DL) {
 | 
						|
  DenseMap<Value *, size_t> WriteTargets; // Map of addresses to index in All
 | 
						|
  // Iterate from the end.
 | 
						|
  for (Instruction *I : reverse(Local)) {
 | 
						|
    const bool IsWrite = isa<StoreInst>(*I);
 | 
						|
    Value *Addr = IsWrite ? cast<StoreInst>(I)->getPointerOperand()
 | 
						|
                          : cast<LoadInst>(I)->getPointerOperand();
 | 
						|
 | 
						|
    if (!shouldInstrumentReadWriteFromAddress(I->getModule(), Addr))
 | 
						|
      continue;
 | 
						|
 | 
						|
    if (!IsWrite) {
 | 
						|
      const auto WriteEntry = WriteTargets.find(Addr);
 | 
						|
      if (!ClInstrumentReadBeforeWrite && WriteEntry != WriteTargets.end()) {
 | 
						|
        auto &WI = All[WriteEntry->second];
 | 
						|
        // If we distinguish volatile accesses and if either the read or write
 | 
						|
        // is volatile, do not omit any instrumentation.
 | 
						|
        const bool AnyVolatile =
 | 
						|
            ClDistinguishVolatile && (cast<LoadInst>(I)->isVolatile() ||
 | 
						|
                                      cast<StoreInst>(WI.Inst)->isVolatile());
 | 
						|
        if (!AnyVolatile) {
 | 
						|
          // We will write to this temp, so no reason to analyze the read.
 | 
						|
          // Mark the write instruction as compound.
 | 
						|
          WI.Flags |= InstructionInfo::kCompoundRW;
 | 
						|
          NumOmittedReadsBeforeWrite++;
 | 
						|
          continue;
 | 
						|
        }
 | 
						|
      }
 | 
						|
 | 
						|
      if (addrPointsToConstantData(Addr)) {
 | 
						|
        // Addr points to some constant data -- it can not race with any writes.
 | 
						|
        continue;
 | 
						|
      }
 | 
						|
    }
 | 
						|
 | 
						|
    if (isa<AllocaInst>(getUnderlyingObject(Addr)) &&
 | 
						|
        !PointerMayBeCaptured(Addr, true, true)) {
 | 
						|
      // The variable is addressable but not captured, so it cannot be
 | 
						|
      // referenced from a different thread and participate in a data race
 | 
						|
      // (see llvm/Analysis/CaptureTracking.h for details).
 | 
						|
      NumOmittedNonCaptured++;
 | 
						|
      continue;
 | 
						|
    }
 | 
						|
 | 
						|
    // Instrument this instruction.
 | 
						|
    All.emplace_back(I);
 | 
						|
    if (IsWrite) {
 | 
						|
      // For read-before-write and compound instrumentation we only need one
 | 
						|
      // write target, and we can override any previous entry if it exists.
 | 
						|
      WriteTargets[Addr] = All.size() - 1;
 | 
						|
    }
 | 
						|
  }
 | 
						|
  Local.clear();
 | 
						|
}
 | 
						|
 | 
						|
static bool isAtomic(Instruction *I) {
 | 
						|
  // TODO: Ask TTI whether synchronization scope is between threads.
 | 
						|
  if (LoadInst *LI = dyn_cast<LoadInst>(I))
 | 
						|
    return LI->isAtomic() && LI->getSyncScopeID() != SyncScope::SingleThread;
 | 
						|
  if (StoreInst *SI = dyn_cast<StoreInst>(I))
 | 
						|
    return SI->isAtomic() && SI->getSyncScopeID() != SyncScope::SingleThread;
 | 
						|
  if (isa<AtomicRMWInst>(I))
 | 
						|
    return true;
 | 
						|
  if (isa<AtomicCmpXchgInst>(I))
 | 
						|
    return true;
 | 
						|
  if (isa<FenceInst>(I))
 | 
						|
    return true;
 | 
						|
  return false;
 | 
						|
}
 | 
						|
 | 
						|
void ThreadSanitizer::InsertRuntimeIgnores(Function &F) {
 | 
						|
  IRBuilder<> IRB(F.getEntryBlock().getFirstNonPHI());
 | 
						|
  IRB.CreateCall(TsanIgnoreBegin);
 | 
						|
  EscapeEnumerator EE(F, "tsan_ignore_cleanup", ClHandleCxxExceptions);
 | 
						|
  while (IRBuilder<> *AtExit = EE.Next()) {
 | 
						|
    AtExit->CreateCall(TsanIgnoreEnd);
 | 
						|
  }
 | 
						|
}
 | 
						|
 | 
						|
bool ThreadSanitizer::sanitizeFunction(Function &F,
 | 
						|
                                       const TargetLibraryInfo &TLI) {
 | 
						|
  // This is required to prevent instrumenting call to __tsan_init from within
 | 
						|
  // the module constructor.
 | 
						|
  if (F.getName() == kTsanModuleCtorName)
 | 
						|
    return false;
 | 
						|
  // Naked functions can not have prologue/epilogue
 | 
						|
  // (__tsan_func_entry/__tsan_func_exit) generated, so don't instrument them at
 | 
						|
  // all.
 | 
						|
  if (F.hasFnAttribute(Attribute::Naked))
 | 
						|
    return false;
 | 
						|
 | 
						|
  // __attribute__(disable_sanitizer_instrumentation) prevents all kinds of
 | 
						|
  // instrumentation.
 | 
						|
  if (F.hasFnAttribute(Attribute::DisableSanitizerInstrumentation))
 | 
						|
    return false;
 | 
						|
 | 
						|
  initialize(*F.getParent());
 | 
						|
  SmallVector<InstructionInfo, 8> AllLoadsAndStores;
 | 
						|
  SmallVector<Instruction*, 8> LocalLoadsAndStores;
 | 
						|
  SmallVector<Instruction*, 8> AtomicAccesses;
 | 
						|
  SmallVector<Instruction*, 8> MemIntrinCalls;
 | 
						|
  bool Res = false;
 | 
						|
  bool HasCalls = false;
 | 
						|
  bool SanitizeFunction = F.hasFnAttribute(Attribute::SanitizeThread);
 | 
						|
  const DataLayout &DL = F.getParent()->getDataLayout();
 | 
						|
 | 
						|
  // Traverse all instructions, collect loads/stores/returns, check for calls.
 | 
						|
  for (auto &BB : F) {
 | 
						|
    for (auto &Inst : BB) {
 | 
						|
      if (isAtomic(&Inst))
 | 
						|
        AtomicAccesses.push_back(&Inst);
 | 
						|
      else if (isa<LoadInst>(Inst) || isa<StoreInst>(Inst))
 | 
						|
        LocalLoadsAndStores.push_back(&Inst);
 | 
						|
      else if ((isa<CallInst>(Inst) && !isa<DbgInfoIntrinsic>(Inst)) ||
 | 
						|
               isa<InvokeInst>(Inst)) {
 | 
						|
        if (CallInst *CI = dyn_cast<CallInst>(&Inst))
 | 
						|
          maybeMarkSanitizerLibraryCallNoBuiltin(CI, &TLI);
 | 
						|
        if (isa<MemIntrinsic>(Inst))
 | 
						|
          MemIntrinCalls.push_back(&Inst);
 | 
						|
        HasCalls = true;
 | 
						|
        chooseInstructionsToInstrument(LocalLoadsAndStores, AllLoadsAndStores,
 | 
						|
                                       DL);
 | 
						|
      }
 | 
						|
    }
 | 
						|
    chooseInstructionsToInstrument(LocalLoadsAndStores, AllLoadsAndStores, DL);
 | 
						|
  }
 | 
						|
 | 
						|
  // We have collected all loads and stores.
 | 
						|
  // FIXME: many of these accesses do not need to be checked for races
 | 
						|
  // (e.g. variables that do not escape, etc).
 | 
						|
 | 
						|
  // Instrument memory accesses only if we want to report bugs in the function.
 | 
						|
  if (ClInstrumentMemoryAccesses && SanitizeFunction)
 | 
						|
    for (const auto &II : AllLoadsAndStores) {
 | 
						|
      Res |= instrumentLoadOrStore(II, DL);
 | 
						|
    }
 | 
						|
 | 
						|
  // Instrument atomic memory accesses in any case (they can be used to
 | 
						|
  // implement synchronization).
 | 
						|
  if (ClInstrumentAtomics)
 | 
						|
    for (auto Inst : AtomicAccesses) {
 | 
						|
      Res |= instrumentAtomic(Inst, DL);
 | 
						|
    }
 | 
						|
 | 
						|
  if (ClInstrumentMemIntrinsics && SanitizeFunction)
 | 
						|
    for (auto Inst : MemIntrinCalls) {
 | 
						|
      Res |= instrumentMemIntrinsic(Inst);
 | 
						|
    }
 | 
						|
 | 
						|
  if (F.hasFnAttribute("sanitize_thread_no_checking_at_run_time")) {
 | 
						|
    assert(!F.hasFnAttribute(Attribute::SanitizeThread));
 | 
						|
    if (HasCalls)
 | 
						|
      InsertRuntimeIgnores(F);
 | 
						|
  }
 | 
						|
 | 
						|
  // Instrument function entry/exit points if there were instrumented accesses.
 | 
						|
  if ((Res || HasCalls) && ClInstrumentFuncEntryExit) {
 | 
						|
    IRBuilder<> IRB(F.getEntryBlock().getFirstNonPHI());
 | 
						|
    Value *ReturnAddress = IRB.CreateCall(
 | 
						|
        Intrinsic::getDeclaration(F.getParent(), Intrinsic::returnaddress),
 | 
						|
        IRB.getInt32(0));
 | 
						|
    IRB.CreateCall(TsanFuncEntry, ReturnAddress);
 | 
						|
 | 
						|
    EscapeEnumerator EE(F, "tsan_cleanup", ClHandleCxxExceptions);
 | 
						|
    while (IRBuilder<> *AtExit = EE.Next()) {
 | 
						|
      AtExit->CreateCall(TsanFuncExit, {});
 | 
						|
    }
 | 
						|
    Res = true;
 | 
						|
  }
 | 
						|
  return Res;
 | 
						|
}
 | 
						|
 | 
						|
bool ThreadSanitizer::instrumentLoadOrStore(const InstructionInfo &II,
 | 
						|
                                            const DataLayout &DL) {
 | 
						|
  IRBuilder<> IRB(II.Inst);
 | 
						|
  const bool IsWrite = isa<StoreInst>(*II.Inst);
 | 
						|
  Value *Addr = IsWrite ? cast<StoreInst>(II.Inst)->getPointerOperand()
 | 
						|
                        : cast<LoadInst>(II.Inst)->getPointerOperand();
 | 
						|
  Type *OrigTy = getLoadStoreType(II.Inst);
 | 
						|
 | 
						|
  // swifterror memory addresses are mem2reg promoted by instruction selection.
 | 
						|
  // As such they cannot have regular uses like an instrumentation function and
 | 
						|
  // it makes no sense to track them as memory.
 | 
						|
  if (Addr->isSwiftError())
 | 
						|
    return false;
 | 
						|
 | 
						|
  int Idx = getMemoryAccessFuncIndex(OrigTy, Addr, DL);
 | 
						|
  if (Idx < 0)
 | 
						|
    return false;
 | 
						|
  if (IsWrite && isVtableAccess(II.Inst)) {
 | 
						|
    LLVM_DEBUG(dbgs() << "  VPTR : " << *II.Inst << "\n");
 | 
						|
    Value *StoredValue = cast<StoreInst>(II.Inst)->getValueOperand();
 | 
						|
    // StoredValue may be a vector type if we are storing several vptrs at once.
 | 
						|
    // In this case, just take the first element of the vector since this is
 | 
						|
    // enough to find vptr races.
 | 
						|
    if (isa<VectorType>(StoredValue->getType()))
 | 
						|
      StoredValue = IRB.CreateExtractElement(
 | 
						|
          StoredValue, ConstantInt::get(IRB.getInt32Ty(), 0));
 | 
						|
    if (StoredValue->getType()->isIntegerTy())
 | 
						|
      StoredValue = IRB.CreateIntToPtr(StoredValue, IRB.getInt8PtrTy());
 | 
						|
    // Call TsanVptrUpdate.
 | 
						|
    IRB.CreateCall(TsanVptrUpdate,
 | 
						|
                   {IRB.CreatePointerCast(Addr, IRB.getInt8PtrTy()),
 | 
						|
                    IRB.CreatePointerCast(StoredValue, IRB.getInt8PtrTy())});
 | 
						|
    NumInstrumentedVtableWrites++;
 | 
						|
    return true;
 | 
						|
  }
 | 
						|
  if (!IsWrite && isVtableAccess(II.Inst)) {
 | 
						|
    IRB.CreateCall(TsanVptrLoad,
 | 
						|
                   IRB.CreatePointerCast(Addr, IRB.getInt8PtrTy()));
 | 
						|
    NumInstrumentedVtableReads++;
 | 
						|
    return true;
 | 
						|
  }
 | 
						|
 | 
						|
  const unsigned Alignment = IsWrite ? cast<StoreInst>(II.Inst)->getAlignment()
 | 
						|
                                     : cast<LoadInst>(II.Inst)->getAlignment();
 | 
						|
  const bool IsCompoundRW =
 | 
						|
      ClCompoundReadBeforeWrite && (II.Flags & InstructionInfo::kCompoundRW);
 | 
						|
  const bool IsVolatile = ClDistinguishVolatile &&
 | 
						|
                          (IsWrite ? cast<StoreInst>(II.Inst)->isVolatile()
 | 
						|
                                   : cast<LoadInst>(II.Inst)->isVolatile());
 | 
						|
  assert((!IsVolatile || !IsCompoundRW) && "Compound volatile invalid!");
 | 
						|
 | 
						|
  const uint32_t TypeSize = DL.getTypeStoreSizeInBits(OrigTy);
 | 
						|
  FunctionCallee OnAccessFunc = nullptr;
 | 
						|
  if (Alignment == 0 || Alignment >= 8 || (Alignment % (TypeSize / 8)) == 0) {
 | 
						|
    if (IsCompoundRW)
 | 
						|
      OnAccessFunc = TsanCompoundRW[Idx];
 | 
						|
    else if (IsVolatile)
 | 
						|
      OnAccessFunc = IsWrite ? TsanVolatileWrite[Idx] : TsanVolatileRead[Idx];
 | 
						|
    else
 | 
						|
      OnAccessFunc = IsWrite ? TsanWrite[Idx] : TsanRead[Idx];
 | 
						|
  } else {
 | 
						|
    if (IsCompoundRW)
 | 
						|
      OnAccessFunc = TsanUnalignedCompoundRW[Idx];
 | 
						|
    else if (IsVolatile)
 | 
						|
      OnAccessFunc = IsWrite ? TsanUnalignedVolatileWrite[Idx]
 | 
						|
                             : TsanUnalignedVolatileRead[Idx];
 | 
						|
    else
 | 
						|
      OnAccessFunc = IsWrite ? TsanUnalignedWrite[Idx] : TsanUnalignedRead[Idx];
 | 
						|
  }
 | 
						|
  IRB.CreateCall(OnAccessFunc, IRB.CreatePointerCast(Addr, IRB.getInt8PtrTy()));
 | 
						|
  if (IsCompoundRW || IsWrite)
 | 
						|
    NumInstrumentedWrites++;
 | 
						|
  if (IsCompoundRW || !IsWrite)
 | 
						|
    NumInstrumentedReads++;
 | 
						|
  return true;
 | 
						|
}
 | 
						|
 | 
						|
static ConstantInt *createOrdering(IRBuilder<> *IRB, AtomicOrdering ord) {
 | 
						|
  uint32_t v = 0;
 | 
						|
  switch (ord) {
 | 
						|
    case AtomicOrdering::NotAtomic:
 | 
						|
      llvm_unreachable("unexpected atomic ordering!");
 | 
						|
    case AtomicOrdering::Unordered:              LLVM_FALLTHROUGH;
 | 
						|
    case AtomicOrdering::Monotonic:              v = 0; break;
 | 
						|
    // Not specified yet:
 | 
						|
    // case AtomicOrdering::Consume:                v = 1; break;
 | 
						|
    case AtomicOrdering::Acquire:                v = 2; break;
 | 
						|
    case AtomicOrdering::Release:                v = 3; break;
 | 
						|
    case AtomicOrdering::AcquireRelease:         v = 4; break;
 | 
						|
    case AtomicOrdering::SequentiallyConsistent: v = 5; break;
 | 
						|
  }
 | 
						|
  return IRB->getInt32(v);
 | 
						|
}
 | 
						|
 | 
						|
// If a memset intrinsic gets inlined by the code gen, we will miss races on it.
 | 
						|
// So, we either need to ensure the intrinsic is not inlined, or instrument it.
 | 
						|
// We do not instrument memset/memmove/memcpy intrinsics (too complicated),
 | 
						|
// instead we simply replace them with regular function calls, which are then
 | 
						|
// intercepted by the run-time.
 | 
						|
// Since tsan is running after everyone else, the calls should not be
 | 
						|
// replaced back with intrinsics. If that becomes wrong at some point,
 | 
						|
// we will need to call e.g. __tsan_memset to avoid the intrinsics.
 | 
						|
bool ThreadSanitizer::instrumentMemIntrinsic(Instruction *I) {
 | 
						|
  IRBuilder<> IRB(I);
 | 
						|
  if (MemSetInst *M = dyn_cast<MemSetInst>(I)) {
 | 
						|
    IRB.CreateCall(
 | 
						|
        MemsetFn,
 | 
						|
        {IRB.CreatePointerCast(M->getArgOperand(0), IRB.getInt8PtrTy()),
 | 
						|
         IRB.CreateIntCast(M->getArgOperand(1), IRB.getInt32Ty(), false),
 | 
						|
         IRB.CreateIntCast(M->getArgOperand(2), IntptrTy, false)});
 | 
						|
    I->eraseFromParent();
 | 
						|
  } else if (MemTransferInst *M = dyn_cast<MemTransferInst>(I)) {
 | 
						|
    IRB.CreateCall(
 | 
						|
        isa<MemCpyInst>(M) ? MemcpyFn : MemmoveFn,
 | 
						|
        {IRB.CreatePointerCast(M->getArgOperand(0), IRB.getInt8PtrTy()),
 | 
						|
         IRB.CreatePointerCast(M->getArgOperand(1), IRB.getInt8PtrTy()),
 | 
						|
         IRB.CreateIntCast(M->getArgOperand(2), IntptrTy, false)});
 | 
						|
    I->eraseFromParent();
 | 
						|
  }
 | 
						|
  return false;
 | 
						|
}
 | 
						|
 | 
						|
// Both llvm and ThreadSanitizer atomic operations are based on C++11/C1x
 | 
						|
// standards.  For background see C++11 standard.  A slightly older, publicly
 | 
						|
// available draft of the standard (not entirely up-to-date, but close enough
 | 
						|
// for casual browsing) is available here:
 | 
						|
// http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2011/n3242.pdf
 | 
						|
// The following page contains more background information:
 | 
						|
// http://www.hpl.hp.com/personal/Hans_Boehm/c++mm/
 | 
						|
 | 
						|
bool ThreadSanitizer::instrumentAtomic(Instruction *I, const DataLayout &DL) {
 | 
						|
  IRBuilder<> IRB(I);
 | 
						|
  if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
 | 
						|
    Value *Addr = LI->getPointerOperand();
 | 
						|
    Type *OrigTy = LI->getType();
 | 
						|
    int Idx = getMemoryAccessFuncIndex(OrigTy, Addr, DL);
 | 
						|
    if (Idx < 0)
 | 
						|
      return false;
 | 
						|
    const unsigned ByteSize = 1U << Idx;
 | 
						|
    const unsigned BitSize = ByteSize * 8;
 | 
						|
    Type *Ty = Type::getIntNTy(IRB.getContext(), BitSize);
 | 
						|
    Type *PtrTy = Ty->getPointerTo();
 | 
						|
    Value *Args[] = {IRB.CreatePointerCast(Addr, PtrTy),
 | 
						|
                     createOrdering(&IRB, LI->getOrdering())};
 | 
						|
    Value *C = IRB.CreateCall(TsanAtomicLoad[Idx], Args);
 | 
						|
    Value *Cast = IRB.CreateBitOrPointerCast(C, OrigTy);
 | 
						|
    I->replaceAllUsesWith(Cast);
 | 
						|
  } else if (StoreInst *SI = dyn_cast<StoreInst>(I)) {
 | 
						|
    Value *Addr = SI->getPointerOperand();
 | 
						|
    int Idx =
 | 
						|
        getMemoryAccessFuncIndex(SI->getValueOperand()->getType(), Addr, DL);
 | 
						|
    if (Idx < 0)
 | 
						|
      return false;
 | 
						|
    const unsigned ByteSize = 1U << Idx;
 | 
						|
    const unsigned BitSize = ByteSize * 8;
 | 
						|
    Type *Ty = Type::getIntNTy(IRB.getContext(), BitSize);
 | 
						|
    Type *PtrTy = Ty->getPointerTo();
 | 
						|
    Value *Args[] = {IRB.CreatePointerCast(Addr, PtrTy),
 | 
						|
                     IRB.CreateBitOrPointerCast(SI->getValueOperand(), Ty),
 | 
						|
                     createOrdering(&IRB, SI->getOrdering())};
 | 
						|
    CallInst *C = CallInst::Create(TsanAtomicStore[Idx], Args);
 | 
						|
    ReplaceInstWithInst(I, C);
 | 
						|
  } else if (AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(I)) {
 | 
						|
    Value *Addr = RMWI->getPointerOperand();
 | 
						|
    int Idx =
 | 
						|
        getMemoryAccessFuncIndex(RMWI->getValOperand()->getType(), Addr, DL);
 | 
						|
    if (Idx < 0)
 | 
						|
      return false;
 | 
						|
    FunctionCallee F = TsanAtomicRMW[RMWI->getOperation()][Idx];
 | 
						|
    if (!F)
 | 
						|
      return false;
 | 
						|
    const unsigned ByteSize = 1U << Idx;
 | 
						|
    const unsigned BitSize = ByteSize * 8;
 | 
						|
    Type *Ty = Type::getIntNTy(IRB.getContext(), BitSize);
 | 
						|
    Type *PtrTy = Ty->getPointerTo();
 | 
						|
    Value *Args[] = {IRB.CreatePointerCast(Addr, PtrTy),
 | 
						|
                     IRB.CreateIntCast(RMWI->getValOperand(), Ty, false),
 | 
						|
                     createOrdering(&IRB, RMWI->getOrdering())};
 | 
						|
    CallInst *C = CallInst::Create(F, Args);
 | 
						|
    ReplaceInstWithInst(I, C);
 | 
						|
  } else if (AtomicCmpXchgInst *CASI = dyn_cast<AtomicCmpXchgInst>(I)) {
 | 
						|
    Value *Addr = CASI->getPointerOperand();
 | 
						|
    Type *OrigOldValTy = CASI->getNewValOperand()->getType();
 | 
						|
    int Idx = getMemoryAccessFuncIndex(OrigOldValTy, Addr, DL);
 | 
						|
    if (Idx < 0)
 | 
						|
      return false;
 | 
						|
    const unsigned ByteSize = 1U << Idx;
 | 
						|
    const unsigned BitSize = ByteSize * 8;
 | 
						|
    Type *Ty = Type::getIntNTy(IRB.getContext(), BitSize);
 | 
						|
    Type *PtrTy = Ty->getPointerTo();
 | 
						|
    Value *CmpOperand =
 | 
						|
      IRB.CreateBitOrPointerCast(CASI->getCompareOperand(), Ty);
 | 
						|
    Value *NewOperand =
 | 
						|
      IRB.CreateBitOrPointerCast(CASI->getNewValOperand(), Ty);
 | 
						|
    Value *Args[] = {IRB.CreatePointerCast(Addr, PtrTy),
 | 
						|
                     CmpOperand,
 | 
						|
                     NewOperand,
 | 
						|
                     createOrdering(&IRB, CASI->getSuccessOrdering()),
 | 
						|
                     createOrdering(&IRB, CASI->getFailureOrdering())};
 | 
						|
    CallInst *C = IRB.CreateCall(TsanAtomicCAS[Idx], Args);
 | 
						|
    Value *Success = IRB.CreateICmpEQ(C, CmpOperand);
 | 
						|
    Value *OldVal = C;
 | 
						|
    if (Ty != OrigOldValTy) {
 | 
						|
      // The value is a pointer, so we need to cast the return value.
 | 
						|
      OldVal = IRB.CreateIntToPtr(C, OrigOldValTy);
 | 
						|
    }
 | 
						|
 | 
						|
    Value *Res =
 | 
						|
      IRB.CreateInsertValue(UndefValue::get(CASI->getType()), OldVal, 0);
 | 
						|
    Res = IRB.CreateInsertValue(Res, Success, 1);
 | 
						|
 | 
						|
    I->replaceAllUsesWith(Res);
 | 
						|
    I->eraseFromParent();
 | 
						|
  } else if (FenceInst *FI = dyn_cast<FenceInst>(I)) {
 | 
						|
    Value *Args[] = {createOrdering(&IRB, FI->getOrdering())};
 | 
						|
    FunctionCallee F = FI->getSyncScopeID() == SyncScope::SingleThread
 | 
						|
                           ? TsanAtomicSignalFence
 | 
						|
                           : TsanAtomicThreadFence;
 | 
						|
    CallInst *C = CallInst::Create(F, Args);
 | 
						|
    ReplaceInstWithInst(I, C);
 | 
						|
  }
 | 
						|
  return true;
 | 
						|
}
 | 
						|
 | 
						|
int ThreadSanitizer::getMemoryAccessFuncIndex(Type *OrigTy, Value *Addr,
 | 
						|
                                              const DataLayout &DL) {
 | 
						|
  assert(OrigTy->isSized());
 | 
						|
  assert(
 | 
						|
      cast<PointerType>(Addr->getType())->isOpaqueOrPointeeTypeMatches(OrigTy));
 | 
						|
  uint32_t TypeSize = DL.getTypeStoreSizeInBits(OrigTy);
 | 
						|
  if (TypeSize != 8  && TypeSize != 16 &&
 | 
						|
      TypeSize != 32 && TypeSize != 64 && TypeSize != 128) {
 | 
						|
    NumAccessesWithBadSize++;
 | 
						|
    // Ignore all unusual sizes.
 | 
						|
    return -1;
 | 
						|
  }
 | 
						|
  size_t Idx = countTrailingZeros(TypeSize / 8);
 | 
						|
  assert(Idx < kNumberOfAccessSizes);
 | 
						|
  return Idx;
 | 
						|
}
 |