.. |
AsmParser
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…
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Disassembler
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Rename `MCFixedLenDisassembler.h` as `MCDecoderOps.h`
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2022-05-15 08:44:58 +08:00 |
MCTargetDesc
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[CodeGen] Move instruction predicate verification to emitInstruction
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2022-07-14 09:33:28 +01:00 |
TargetInfo
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…
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CMakeLists.txt
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…
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LVLGen.cpp
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…
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VE.h
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[VE][NFC] Remove obsoleted function declaration
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2022-06-19 13:33:46 +09:00 |
VE.td
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[TableGen] Add useDeprecatedPositionallyEncodedOperands option.
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2022-09-24 09:40:45 -04:00 |
VEAsmPrinter.cpp
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[VE] Support inlineasm memory operand
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2022-08-23 13:44:03 +09:00 |
VECallingConv.td
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…
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VECustomDAG.cpp
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[llvm] Use value_or instead of getValueOr (NFC)
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2022-06-18 23:07:11 -07:00 |
VECustomDAG.h
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[VE] v512|256 f32|64 fneg isel and tests
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2022-03-16 11:31:26 +01:00 |
VEFrameLowering.cpp
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…
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VEFrameLowering.h
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[llvm] Use std::size instead of llvm::array_lengthof
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2022-09-08 09:01:53 -06:00 |
VEISelDAGToDAG.cpp
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[VE] Support inlineasm memory operand
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2022-08-23 13:44:03 +09:00 |
VEISelLowering.cpp
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[VE] Change to expand FPOW
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2022-09-27 20:03:10 +09:00 |
VEISelLowering.h
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[X86] Promote i8/i16 CTTZ (BSF) instructions and remove speculation branch
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2022-08-24 17:28:18 +01:00 |
VEInstrBuilder.h
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…
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VEInstrFormats.td
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…
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VEInstrInfo.cpp
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[VE] Support load/store/spill of vector mask registers
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2022-07-19 10:29:21 +09:00 |
VEInstrInfo.h
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…
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VEInstrInfo.td
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[VE] Disable automatic maxnum/minnum selection
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2022-09-26 22:04:02 +09:00 |
VEInstrIntrinsicVL.gen.td
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[VE] Support more intrinsics
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2022-03-14 19:17:15 +09:00 |
VEInstrIntrinsicVL.td
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[VE] Support more intrinsics
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2022-03-14 19:17:15 +09:00 |
VEInstrPatternsVec.td
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[VE] Support load/store/spill of vector mask registers
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2022-07-19 10:29:21 +09:00 |
VEInstrVec.td
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[VE] Support load/store/spill of vector mask registers
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2022-07-19 10:29:21 +09:00 |
VEMCInstLower.cpp
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…
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VEMachineFunctionInfo.cpp
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llvm-reduce: Add cloning of target MachineFunctionInfo
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2022-06-07 10:14:48 -04:00 |
VEMachineFunctionInfo.h
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llvm-reduce: Add cloning of target MachineFunctionInfo
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2022-06-07 10:14:48 -04:00 |
VERegisterInfo.cpp
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[RegisterInfoEmitter] Generate isConstantPhysReg(). NFCI
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2022-08-24 14:16:20 +00:00 |
VERegisterInfo.h
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[RegisterInfoEmitter] Generate isConstantPhysReg(). NFCI
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2022-08-24 14:16:20 +00:00 |
VERegisterInfo.td
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[RegisterInfoEmitter] Generate isConstantPhysReg(). NFCI
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2022-08-24 14:16:20 +00:00 |
VESubtarget.cpp
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…
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VESubtarget.h
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…
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VETargetMachine.cpp
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[llvm] Use value_or instead of getValueOr (NFC)
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2022-06-18 23:07:11 -07:00 |
VETargetMachine.h
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…
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VETargetTransformInfo.h
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[VE] v256i32|64 reduction isel and tests
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2022-03-14 11:10:38 +01:00 |
VVPISelLowering.cpp
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[llvm] Use value instead of getValue (NFC)
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2022-07-13 23:11:56 -07:00 |
VVPInstrInfo.td
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[VE] v512|256 f32|64 fneg isel and tests
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2022-03-16 11:31:26 +01:00 |
VVPInstrPatternsVec.td
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[VE] v512|256 f32|64 fneg isel and tests
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2022-03-16 11:31:26 +01:00 |
VVPNodes.def
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[VE] v512|256 f32|64 fneg isel and tests
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2022-03-16 11:31:26 +01:00 |