bipmis 3b49a9fcf6 [AggressiveInstCombine] Combine consecutive loads which are being merged to form a wider load. ... The patch simplifies some of the patterns as below 1. (ZExt(L1) << shift1) | (ZExt(L2) << shift2) -> ZExt(L3) << shift1 2. (ZExt(L1) << shift1) | ZExt(L2) -> ZExt(L3) The pattern is indicative of the fact that the loads are being merged to a wider load and the only use of this pattern is with a wider load. In this case for a non-atomic/non-volatile loads reduce the pattern to a combined load which would improve the cost of inlining, unrolling, vectorization etc. Fix the error reported on reverse load merge. Differential Revision: https://reviews.llvm.org/D127392		2022-09-28 17:32:47 +01:00
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AggressiveInstCombine.cpp	[AggressiveInstCombine] Combine consecutive loads which are being merged to form a wider load.	2022-09-28 17:32:47 +01:00
AggressiveInstCombineInternal.h	[AggressiveInstCombine] Add `phi` nodes support to `TruncInstCombine`	2022-02-25 07:57:35 +03:00
CMakeLists.txt	…
TruncInstCombine.cpp	Use llvm::is_contained (NFC)	2022-08-27 09:53:11 -07:00