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Sanjay Patel 2e87333bfe [InstCombine] convert mul by negative-pow2 to negate and shift 
This is an unusual canonicalization because we create an extra instruction,
but it's likely better for analysis and codegen (similar reasoning as D133399).

InstCombine::Negator may create this kind of multiply from negate and shift,
but this should not conflict because of the narrow negation.

I don't know how to create a fully general proof for this kind of transform in
Alive2, but here's an example with bitwidths similar to one of the regression
tests:
https://alive2.llvm.org/ce/z/J3jTjR

Differential Revision: https://reviews.llvm.org/D133667
 		2022-10-02 12:22:25 -04:00
..
CMakeLists.txt
…
InstCombineAddSub.cpp [InstCombine] try to fold mul by neg-power-of-2 to shl 2022-09-21 15:09:39 -04:00
InstCombineAndOrXor.cpp [InstCombine] reduce another or-xor bitwise logic pattern 2022-09-03 09:32:08 -04:00
InstCombineAtomicRMW.cpp [LLVM] Add the support for fmax and fmin in atomicrmw instruction 2022-07-06 10:57:53 -04:00
InstCombineCalls.cpp [InstCombine] add assert/test for zext to i1 2022-09-26 16:01:25 -04:00
InstCombineCasts.cpp [InstCombine] Remove buggy zext of icmp eq with pow2 fold (PR57899) 2022-09-22 16:37:10 +02:00
InstCombineCompares.cpp [InstCombine] Fold ult(add(x,-1),c) -> ule(x,c) iff x != 0 (PR57635) 2022-09-20 16:44:41 +01:00
InstCombineInternal.h [InstCombine] add helper function for extract of with-overflow-intrinsic; NFC 2022-08-09 12:38:11 -04:00
InstCombineLoadStoreAlloca.cpp [Transforms] Qualify auto in range-based for loops (NFC) 2022-08-27 21:21:02 -07:00
InstCombineMulDivRem.cpp [InstCombine] convert mul by negative-pow2 to negate and shift 2022-10-02 12:22:25 -04:00
InstCombineNegator.cpp [InstCombine] don't canonicalize shl+sub to mul+add 2022-09-21 08:39:07 -04:00
InstCombinePHI.cpp [InstCombine] Improve check for catchswitch BBs (NFC) 2022-06-15 01:06:13 -07:00
InstCombineSelect.cpp [InstCombine] Use simplifyWithOpReplaced() for non-bool selects 2022-09-22 15:46:00 +02:00
InstCombineShifts.cpp [InstCombine] fold full-shift of sdiv to icmp+extend 2022-09-18 13:13:14 -04:00
InstCombineSimplifyDemanded.cpp [InstCombine] try multi-use demanded bits fold for 'sub' 2022-09-21 14:13:05 -04:00
InstCombineVectorOps.cpp [InstCombine] fold select shuffles with shared operand together 2022-09-28 11:56:27 -04:00
InstructionCombining.cpp Add helper func to get first non-alloca position 2022-09-09 15:39:53 +02:00