69 lines
1.9 KiB
LLVM
69 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s
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declare i4 @llvm.uadd.sat.i4(i4, i4)
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declare i8 @llvm.uadd.sat.i8(i8, i8)
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declare i16 @llvm.uadd.sat.i16(i16, i16)
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declare i32 @llvm.uadd.sat.i32(i32, i32)
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declare i64 @llvm.uadd.sat.i64(i64, i64)
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define i32 @func(i32 %x, i32 %y) nounwind {
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; CHECK-LABEL: func:
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; CHECK: // %bb.0:
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; CHECK-NEXT: adds w8, w0, w1
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; CHECK-NEXT: csinv w0, w8, wzr, lo
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; CHECK-NEXT: ret
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%tmp = call i32 @llvm.uadd.sat.i32(i32 %x, i32 %y);
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ret i32 %tmp;
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}
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define i64 @func2(i64 %x, i64 %y) nounwind {
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; CHECK-LABEL: func2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: adds x8, x0, x1
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; CHECK-NEXT: csinv x0, x8, xzr, lo
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; CHECK-NEXT: ret
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%tmp = call i64 @llvm.uadd.sat.i64(i64 %x, i64 %y);
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ret i64 %tmp;
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}
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define i16 @func16(i16 %x, i16 %y) nounwind {
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; CHECK-LABEL: func16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: and w8, w0, #0xffff
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; CHECK-NEXT: mov w9, #65535
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; CHECK-NEXT: add w8, w8, w1, uxth
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; CHECK-NEXT: cmp w8, w9
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; CHECK-NEXT: csel w0, w8, w9, lo
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; CHECK-NEXT: ret
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%tmp = call i16 @llvm.uadd.sat.i16(i16 %x, i16 %y);
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ret i16 %tmp;
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}
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define i8 @func8(i8 %x, i8 %y) nounwind {
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; CHECK-LABEL: func8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: and w8, w0, #0xff
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; CHECK-NEXT: mov w9, #255
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; CHECK-NEXT: add w8, w8, w1, uxtb
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; CHECK-NEXT: cmp w8, #255
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; CHECK-NEXT: csel w0, w8, w9, lo
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; CHECK-NEXT: ret
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%tmp = call i8 @llvm.uadd.sat.i8(i8 %x, i8 %y);
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ret i8 %tmp;
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}
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define i4 @func3(i4 %x, i4 %y) nounwind {
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; CHECK-LABEL: func3:
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; CHECK: // %bb.0:
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; CHECK-NEXT: and w8, w1, #0xf
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; CHECK-NEXT: and w9, w0, #0xf
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; CHECK-NEXT: add w8, w9, w8
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; CHECK-NEXT: mov w9, #15
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; CHECK-NEXT: cmp w8, #15
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; CHECK-NEXT: csel w0, w8, w9, lo
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; CHECK-NEXT: ret
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%tmp = call i4 @llvm.uadd.sat.i4(i4 %x, i4 %y);
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ret i4 %tmp;
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}
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